240429103c
It's a class0 driver that implements some pcib methods and creates a pci bus as its children. The "ofw_pci" name will be used by a new driver that will be a subclass of the pci bus. No functional changes intended. Submitted by: Kornel Duleba <mindal@semihalf.com> Reviewed by: andrew Obtained from: Semihalf Sponsored by: Alstom Group Differential Revision: https://reviews.freebsd.org/D30226
88 lines
2.5 KiB
C
88 lines
2.5 KiB
C
/*-
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* Copyright (c) 2011 Nathan Whitehorn
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _DEV_OFW_OFWPCI_H_
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#define _DEV_OFW_OFWPCI_H_
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/*
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* Export class definition for inheritance purposes
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*/
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DECLARE_CLASS(ofw_pcib_driver);
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struct ofw_pci_cell_info {
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pcell_t host_address_cells;
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pcell_t pci_address_cell;
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pcell_t size_cells;
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};
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struct ofw_pci_range {
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uint32_t pci_hi;
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uint64_t pci;
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uint64_t host;
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uint64_t size;
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};
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/*
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* Quirks for some adapters
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*/
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enum {
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OFW_PCI_QUIRK_RANGES_ON_CHILDREN = 1,
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};
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struct ofw_pci_softc {
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device_t sc_dev;
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phandle_t sc_node;
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int sc_bus;
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int sc_initialized;
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int sc_quirks;
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int sc_have_pmem;
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struct ofw_pci_range *sc_range;
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int sc_nrange;
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uint64_t sc_range_mask;
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struct ofw_pci_cell_info *sc_cell_info;
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struct rman sc_io_rman;
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struct rman sc_mem_rman;
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struct rman sc_pmem_rman;
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bus_space_tag_t sc_memt;
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bus_dma_tag_t sc_dmat;
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int sc_pci_domain;
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struct ofw_bus_iinfo sc_pci_iinfo;
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};
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int ofw_pcib_init(device_t);
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int ofw_pcib_attach(device_t);
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int ofw_pcib_read_ivar(device_t, device_t, int, uintptr_t *);
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int ofw_pcib_write_ivar(device_t, device_t, int, uintptr_t);
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int ofw_pcib_route_interrupt(device_t, device_t, int);
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int ofw_pcib_nranges(phandle_t, struct ofw_pci_cell_info *);
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#endif /* _DEV_OFW_OFWPCI_H_ */
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