988d63af1c
The SLB spill handlers are AIM-specific, and belong better with the rest of the SLB code anyway. No functional change.
87 lines
3.2 KiB
C
87 lines
3.2 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (C) 2009 Nathan Whitehorn
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _MACHINE_SLB_H_
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#define _MACHINE_SLB_H_
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/*
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* Bit definitions for segment lookaside buffer entries.
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*
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* PowerPC Microprocessor Family: The Programming Environments for 64-bit
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* Microprocessors, section 7.4.2.1
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*
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* Note that these bitmasks are relative to the values for one of the two
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* values for slbmte, slbmfee, and slbmfev, not the internal SLB
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* representation.
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*/
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#define SLBV_KS 0x0000000000000800UL /* Supervisor-state prot key */
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#define SLBV_KP 0x0000000000000400UL /* User-state prot key */
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#define SLBV_N 0x0000000000000200UL /* No-execute protection */
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#define SLBV_L 0x0000000000000100UL /* Large page selector */
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#define SLBV_CLASS 0x0000000000000080UL /* Class selector */
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#define SLBV_VSID_MASK 0xfffffffffffff000UL /* Virtual segment ID mask */
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#define SLBV_VSID_SHIFT 12
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/*
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* Make a predictable 1:1 map from ESIDs to VSIDs for the kernel. Hash table
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* coverage is increased by swizzling the ESID and multiplying by a prime
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* number (0x13bb).
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*/
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#define KERNEL_VSID_BIT 0x0000001000000000UL /* Bit set in all kernel VSIDs */
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#define KERNEL_VSID(esid) ((((((uint64_t)esid << 8) | ((uint64_t)esid >> 28)) \
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* 0x13bbUL) & (KERNEL_VSID_BIT - 1)) | \
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KERNEL_VSID_BIT)
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#define SLBE_VALID 0x0000000008000000UL /* SLB entry valid */
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#define SLBE_INDEX_MASK 0x0000000000000fffUL /* SLB index mask*/
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#define SLBE_ESID_MASK 0xfffffffff0000000UL /* Effective segment ID mask */
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#define SLBE_ESID_SHIFT 28
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/* Virtual real-mode VSID in LPARs */
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#define VSID_VRMA 0x1ffffff
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/*
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* User segment for copyin/out
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*/
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#define USER_SLB_SLOT 0
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#define USER_SLB_SLBE (((USER_ADDR >> ADDR_SR_SHFT) << SLBE_ESID_SHIFT) | \
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SLBE_VALID | USER_SLB_SLOT)
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struct slb {
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uint64_t slbv;
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uint64_t slbe;
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};
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struct pmap;
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void handle_kernel_slb_spill(int, register_t, register_t);
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int handle_user_slb_spill(struct pmap *pm, vm_offset_t addr);
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#endif /* !_MACHINE_SLB_H_ */
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