45d426a34e
mips32r2 and mips64r2 (and close relatives) processors. There presently is support for ADMtek ADM5120, A mips 4Kc in a malta board, the RB533 routerboard (based on IDT RC32434) and some preliminary support for sibtye/broadcom designs. Other hardware support will be forthcomcing. This port boots multiuser under gxemul emulating the malta board and also bootstraps on the hardware whose support is forthcoming... Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard, Randall Stewert and others that have contributed to the mips2 and/or mips2-jnpr perforce branches. Juniper contirbuted a generic mips port late in the life cycle of the misp2 branch. Warner Losh merged the mips2 and Juniper code bases, and others list above have worked for the past several months to get to multiuser. In addition, the mips2 work owe a debt to the trail blazing efforts of the original mips branch in perforce done by Juli Mallett.
173 lines
4.6 KiB
C
173 lines
4.6 KiB
C
/* $OpenBSD: profile.h,v 1.2 1999/01/27 04:46:05 imp Exp $ */
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/*-
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* Copyright (c) 1992, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* Ralph Campbell.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: @(#)profile.h 8.1 (Berkeley) 6/10/93
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* JNPR: profile.h,v 1.4 2006/12/02 09:53:41 katta
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* $FreeBSD$
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*/
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#ifndef _MACHINE_PROFILE_H_
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#define _MACHINE_PROFILE_H_
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#define _MCOUNT_DECL void ___mcount
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/*XXX The cprestore instruction is a "dummy" to shut up as(1). */
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#define MCOUNT \
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__asm(".globl _mcount;" \
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".type _mcount,@function;" \
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"_mcount:;" \
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".set noreorder;" \
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".set noat;" \
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".cpload $25;" \
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".cprestore 4;" \
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"sw $4,8($29);" \
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"sw $5,12($29);" \
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"sw $6,16($29);" \
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"sw $7,20($29);" \
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"sw $1,0($29);" \
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"sw $31,4($29);" \
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"move $5,$31;" \
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"jal ___mcount;" \
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"move $4,$1;" \
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"lw $4,8($29);" \
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"lw $5,12($29);" \
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"lw $6,16($29);" \
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"lw $7,20($29);" \
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"lw $31,4($29);" \
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"lw $1,0($29);" \
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"addu $29,$29,8;" \
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"j $31;" \
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"move $31,$1;" \
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".set reorder;" \
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".set at");
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#ifdef _KERNEL
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/*
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* The following two macros do splhigh and splx respectively.
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* They have to be defined this way because these are real
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* functions on the MIPS, and we do not want to invoke mcount
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* recursively.
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*/
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#define MCOUNT_DECL(s) u_long s;
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#ifdef SMP
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extern int mcount_lock;
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#define MCOUNT_ENTER(s) { \
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s = disable_intr(); \
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while (!atomic_cmpset_acq_int(&mcount_lock, 0, 1)) \
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/* nothing */ ; \
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}
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#define MCOUNT_EXIT(s) { \
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atomic_store_rel_int(&mcount_lock, 0); \
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enableintr(s); \
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}
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#else
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#define MCOUNT_ENTER(s) { s = disable_intr(); }
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#define MCOUNT_EXIT(s) (enableintr(s))
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#endif
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/* REVISIT for mips */
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/*
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* Config generates something to tell the compiler to align functions on 16
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* byte boundaries. A strict alignment is good for keeping the tables small.
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*/
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#define FUNCTION_ALIGNMENT 16
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#ifdef GUPROF
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struct gmonparam;
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void stopguprof __P((struct gmonparam *p));
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#else
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#define stopguprof(p)
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#endif /* GUPROF */
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#else /* !_KERNEL */
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#define FUNCTION_ALIGNMENT 4
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typedef unsigned int uintfptr_t;
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#endif /* _KERNEL */
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/*
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* An unsigned integral type that can hold non-negative difference between
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* function pointers.
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*/
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typedef u_int fptrdiff_t;
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#ifdef _KERNEL
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void mcount(uintfptr_t frompc, uintfptr_t selfpc);
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#ifdef GUPROF
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struct gmonparam;
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void nullfunc_loop_profiled(void);
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void nullfunc_profiled(void);
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void startguprof(struct gmonparam *p);
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void stopguprof(struct gmonparam *p);
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#else
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#define startguprof(p)
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#define stopguprof(p)
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#endif /* GUPROF */
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#else /* !_KERNEL */
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#include <sys/cdefs.h>
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__BEGIN_DECLS
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#ifdef __GNUC__
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#ifdef __ELF__
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void mcount(void) __asm(".mcount");
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#else
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void mcount(void) __asm("mcount");
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#endif
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#endif
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void _mcount(uintfptr_t frompc, uintfptr_t selfpc);
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__END_DECLS
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#endif /* _KERNEL */
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#ifdef GUPROF
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/* XXX doesn't quite work outside kernel yet. */
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extern int cputime_bias;
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__BEGIN_DECLS
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int cputime(void);
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void empty_loop(void);
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void mexitcount(uintfptr_t selfpc);
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void nullfunc(void);
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void nullfunc_loop(void);
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__END_DECLS
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#endif
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#endif /* !_MACHINE_PROFILE_H_ */
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