122 lines
3.7 KiB
ArmAsm
122 lines
3.7 KiB
ArmAsm
/* Support functions for the unwinder.
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Copyright (C) 2003, 2004, 2005 Free Software Foundation, Inc.
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Contributed by Paul Brook
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This file is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published by the
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Free Software Foundation; either version 2, or (at your option) any
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later version.
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In addition to the permissions in the GNU General Public License, the
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Free Software Foundation gives you unlimited permission to link the
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compiled version of this file into combinations with other programs,
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and to distribute those combinations without any restriction coming
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from the use of this file. (The General Public License restrictions
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do apply in other respects; for example, they cover modification of
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the file, and distribution when not linked into a combine
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executable.)
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This file is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; see the file COPYING. If not, write to
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the Free Software Foundation, 51 Franklin Street, Fifth Floor,
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Boston, MA 02110-1301, USA. */
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#ifndef __symbian__
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#include "lib1funcs.asm"
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.macro UNPREFIX name
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.global SYM (\name)
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EQUIV SYM (\name), SYM (__\name)
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.endm
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/* r0 points to a 16-word block. Upload these values to the actual core
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state. */
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ARM_FUNC_START restore_core_regs
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/* We must use sp as the base register when restoring sp. Push the
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last 3 registers onto the top of the current stack to achieve
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this. */
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add r1, r0, #52
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ldmia r1, {r3, r4, r5} /* {sp, lr, pc}. */
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#ifdef __INTERWORKING__
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/* Restore pc into ip. */
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mov r2, r5
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stmfd sp!, {r2, r3, r4}
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#else
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stmfd sp!, {r3, r4, r5}
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#endif
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/* Don't bother restoring ip. */
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ldmia r0, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp}
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/* Pop the three registers we pushed earlier. */
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#ifdef __INTERWORKING__
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ldmfd sp, {ip, sp, lr}
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bx ip
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#else
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ldmfd sp, {sp, lr, pc}
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#endif
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FUNC_END restore_core_regs
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UNPREFIX restore_core_regs
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/* Load VFP registers d0-d15 from the address in r0. */
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ARM_FUNC_START gnu_Unwind_Restore_VFP
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/* Use the generic coprocessor form so that gas doesn't complain
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on soft-float targets. */
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ldc p11,cr0,[r0],{0x21} /* fldmiax r0, {d0-d15} */
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RET
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/* Store VFR regsters d0-d15 to the address in r0. */
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ARM_FUNC_START gnu_Unwind_Save_VFP
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/* Use the generic coprocessor form so that gas doesn't complain
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on soft-float targets. */
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stc p11,cr0,[r0],{0x21} /* fstmiax r0, {d0-d15} */
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RET
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/* Wrappers to save core registers, then call the real routine. */
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.macro UNWIND_WRAPPER name nargs
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ARM_FUNC_START \name
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/* Create a phase2_vrs structure. */
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/* Split reg push in two to ensure the correct value for sp. */
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stmfd sp!, {sp, lr, pc}
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stmfd sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip}
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/* Demand-save flags, plus an extra word for alignment. */
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mov r3, #0
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stmfd sp!, {r2, r3}
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/* Point r1 at the block. Pass r[0..nargs) unchanged. */
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add r\nargs, sp, #4
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#if defined(__thumb__)
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/* Switch back to thumb mode to avoid interworking hassle. */
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adr ip, .L1_\name
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orr ip, ip, #1
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bx ip
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.thumb
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.L1_\name:
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bl SYM (__gnu\name) __PLT__
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ldr r3, [sp, #64]
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add sp, #72
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bx r3
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#else
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bl SYM (__gnu\name) __PLT__
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ldr lr, [sp, #64]
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add sp, sp, #72
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RET
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#endif
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FUNC_END \name
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UNPREFIX \name
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.endm
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UNWIND_WRAPPER _Unwind_RaiseException 1
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UNWIND_WRAPPER _Unwind_Resume 1
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UNWIND_WRAPPER _Unwind_Resume_or_Rethrow 1
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UNWIND_WRAPPER _Unwind_ForcedUnwind 3
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UNWIND_WRAPPER _Unwind_Backtrace 2
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#endif /* ndef __symbian__ */
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