bbc6da03ef
strings and include arbitrary information (IRQ line/domain/sense). When the ofw_bus_map_intr() API was introduced, it assumed that, as on most systems, these were either 1 cell, containing an interrupt line, or 2, containing a line number plus a sense code. It turns out a non-negligible number of ARM systems use 3 (or even 4!) cells for interrupts, so make this more general.
376 lines
10 KiB
C
376 lines
10 KiB
C
/*-
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* Copyright (c) 1997, Stefan Esser <se@freebsd.org>
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* Copyright (c) 2000, Michael Smith <msmith@freebsd.org>
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* Copyright (c) 2000, BSDi
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* Copyright (c) 2003, Thomas Moestl <tmm@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice unmodified, this list of conditions, and the following
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* disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/libkern.h>
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#include <sys/module.h>
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#include <sys/pciio.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/ofw/ofw_pci.h>
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#include <dev/ofw/openfirm.h>
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#include <machine/bus.h>
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#include <machine/intr_machdep.h>
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#include <machine/resource.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pci_private.h>
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#include "ofw_pcibus.h"
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#include "pcib_if.h"
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#include "pci_if.h"
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typedef uint32_t ofw_pci_intr_t;
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/* Methods */
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static device_probe_t ofw_pcibus_probe;
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static device_attach_t ofw_pcibus_attach;
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static pci_assign_interrupt_t ofw_pcibus_assign_interrupt;
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static ofw_bus_get_devinfo_t ofw_pcibus_get_devinfo;
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static int ofw_pcibus_child_pnpinfo_str_method(device_t cbdev, device_t child,
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char *buf, size_t buflen);
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static void ofw_pcibus_enum_devtree(device_t dev, u_int domain, u_int busno);
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static void ofw_pcibus_enum_bus(device_t dev, u_int domain, u_int busno);
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static device_method_t ofw_pcibus_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, ofw_pcibus_probe),
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DEVMETHOD(device_attach, ofw_pcibus_attach),
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/* Bus interface */
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DEVMETHOD(bus_child_pnpinfo_str, ofw_pcibus_child_pnpinfo_str_method),
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/* PCI interface */
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DEVMETHOD(pci_assign_interrupt, ofw_pcibus_assign_interrupt),
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/* ofw_bus interface */
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DEVMETHOD(ofw_bus_get_devinfo, ofw_pcibus_get_devinfo),
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DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat),
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DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model),
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DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name),
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DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node),
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DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type),
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DEVMETHOD_END
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};
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static devclass_t pci_devclass;
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DEFINE_CLASS_1(pci, ofw_pcibus_driver, ofw_pcibus_methods,
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sizeof(struct pci_softc), pci_driver);
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DRIVER_MODULE(ofw_pcibus, pcib, ofw_pcibus_driver, pci_devclass, 0, 0);
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MODULE_VERSION(ofw_pcibus, 1);
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MODULE_DEPEND(ofw_pcibus, pci, 1, 1, 1);
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static int ofw_devices_only = 0;
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TUNABLE_INT("hw.pci.ofw_devices_only", &ofw_devices_only);
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static int
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ofw_pcibus_probe(device_t dev)
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{
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if (ofw_bus_get_node(dev) == -1)
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return (ENXIO);
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device_set_desc(dev, "OFW PCI bus");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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ofw_pcibus_attach(device_t dev)
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{
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u_int busno, domain;
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int error;
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error = pci_attach_common(dev);
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if (error)
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return (error);
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domain = pcib_get_domain(dev);
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busno = pcib_get_bus(dev);
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/*
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* Attach those children represented in the device tree.
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*/
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ofw_pcibus_enum_devtree(dev, domain, busno);
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/*
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* We now attach any laggard devices. FDT, for instance, allows
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* the device tree to enumerate only some PCI devices. Apple's
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* OF device tree on some Grackle-based hardware can also miss
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* functions on multi-function cards.
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*/
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if (!ofw_devices_only)
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ofw_pcibus_enum_bus(dev, domain, busno);
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return (bus_generic_attach(dev));
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}
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static void
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ofw_pcibus_enum_devtree(device_t dev, u_int domain, u_int busno)
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{
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device_t pcib;
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struct ofw_pci_register pcir;
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struct ofw_pcibus_devinfo *dinfo;
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phandle_t node, child;
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u_int func, slot;
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int intline;
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pcib = device_get_parent(dev);
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node = ofw_bus_get_node(dev);
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for (child = OF_child(node); child != 0; child = OF_peer(child)) {
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if (OF_getprop(child, "reg", &pcir, sizeof(pcir)) == -1)
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continue;
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slot = OFW_PCI_PHYS_HI_DEVICE(pcir.phys_hi);
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func = OFW_PCI_PHYS_HI_FUNCTION(pcir.phys_hi);
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/* Some OFW device trees contain dupes. */
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if (pci_find_dbsf(domain, busno, slot, func) != NULL)
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continue;
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/*
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* The preset in the intline register is usually bogus. Reset
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* it such that the PCI code will reroute the interrupt if
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* needed.
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*/
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intline = PCI_INVALID_IRQ;
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if (OF_getproplen(child, "interrupts") > 0)
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intline = 0;
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PCIB_WRITE_CONFIG(pcib, busno, slot, func, PCIR_INTLINE,
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intline, 1);
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/*
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* Now set up the PCI and OFW bus layer devinfo and add it
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* to the PCI bus.
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*/
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dinfo = (struct ofw_pcibus_devinfo *)pci_read_device(pcib,
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domain, busno, slot, func, sizeof(*dinfo));
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if (dinfo == NULL)
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continue;
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if (ofw_bus_gen_setup_devinfo(&dinfo->opd_obdinfo, child) !=
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0) {
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pci_freecfg((struct pci_devinfo *)dinfo);
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continue;
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}
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dinfo->opd_dma_tag = NULL;
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pci_add_child(dev, (struct pci_devinfo *)dinfo);
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/*
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* Some devices don't have an intpin set, but do have
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* interrupts. These are fully specified, and set in the
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* interrupts property, so add that value to the device's
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* resource list.
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*/
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if (dinfo->opd_dinfo.cfg.intpin == 0) {
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ofw_pci_intr_t intr[2];
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phandle_t iparent;
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int icells;
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if (OF_getprop(child, "interrupts", &intr,
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sizeof(intr)) > 0) {
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iparent = 0;
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icells = 1;
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OF_getprop(child, "interrupt-parent", &iparent,
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sizeof(iparent));
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if (iparent != 0) {
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OF_getprop(OF_xref_phandle(iparent),
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"#interrupt-cells", &icells,
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sizeof(icells));
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intr[0] = ofw_bus_map_intr(dev, iparent,
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icells, intr);
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}
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resource_list_add(&dinfo->opd_dinfo.resources,
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SYS_RES_IRQ, 0, intr[0], intr[0], 1);
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}
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}
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}
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}
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/*
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* The following is an almost exact clone of pci_add_children(), with the
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* addition that it (a) will not add children that have already been added,
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* and (b) will set up the OFW devinfo to point to invalid values. This is
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* to handle non-enumerated PCI children as exist in FDT and on the second
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* function of the Rage 128 in my Blue & White G3.
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*/
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static void
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ofw_pcibus_enum_bus(device_t dev, u_int domain, u_int busno)
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{
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device_t pcib;
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struct ofw_pcibus_devinfo *dinfo;
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int maxslots;
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int s, f, pcifunchigh;
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uint8_t hdrtype;
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pcib = device_get_parent(dev);
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maxslots = PCIB_MAXSLOTS(pcib);
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for (s = 0; s <= maxslots; s++) {
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pcifunchigh = 0;
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f = 0;
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DELAY(1);
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hdrtype = PCIB_READ_CONFIG(pcib, busno, s, f, PCIR_HDRTYPE, 1);
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if ((hdrtype & PCIM_HDRTYPE) > PCI_MAXHDRTYPE)
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continue;
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if (hdrtype & PCIM_MFDEV)
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pcifunchigh = PCI_FUNCMAX;
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for (f = 0; f <= pcifunchigh; f++) {
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/* Filter devices we have already added */
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if (pci_find_dbsf(domain, busno, s, f) != NULL)
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continue;
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dinfo = (struct ofw_pcibus_devinfo *)pci_read_device(
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pcib, domain, busno, s, f, sizeof(*dinfo));
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if (dinfo == NULL)
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continue;
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dinfo->opd_dma_tag = NULL;
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dinfo->opd_obdinfo.obd_node = -1;
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dinfo->opd_obdinfo.obd_name = NULL;
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dinfo->opd_obdinfo.obd_compat = NULL;
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dinfo->opd_obdinfo.obd_type = NULL;
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dinfo->opd_obdinfo.obd_model = NULL;
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/*
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* For non OFW-devices, don't believe 0
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* for an interrupt.
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*/
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if (dinfo->opd_dinfo.cfg.intline == 0) {
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dinfo->opd_dinfo.cfg.intline = PCI_INVALID_IRQ;
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PCIB_WRITE_CONFIG(pcib, busno, s, f,
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PCIR_INTLINE, PCI_INVALID_IRQ, 1);
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}
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pci_add_child(dev, (struct pci_devinfo *)dinfo);
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}
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}
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}
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static int
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ofw_pcibus_child_pnpinfo_str_method(device_t cbdev, device_t child, char *buf,
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size_t buflen)
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{
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pci_child_pnpinfo_str_method(cbdev, child, buf, buflen);
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if (ofw_bus_get_node(child) != -1) {
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strlcat(buf, " ", buflen); /* Separate info */
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ofw_bus_gen_child_pnpinfo_str(cbdev, child, buf, buflen);
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}
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return (0);
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}
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static int
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ofw_pcibus_assign_interrupt(device_t dev, device_t child)
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{
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ofw_pci_intr_t intr[2];
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phandle_t node, iparent;
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int isz, icells;
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node = ofw_bus_get_node(child);
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if (node == -1) {
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/* Non-firmware enumerated child, use standard routing */
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intr[0] = pci_get_intpin(child);
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return (PCIB_ROUTE_INTERRUPT(device_get_parent(dev), child,
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intr[0]));
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}
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/*
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* Try to determine the node's interrupt parent so we know which
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* PIC to use.
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*/
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iparent = -1;
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if (OF_getprop(node, "interrupt-parent", &iparent, sizeof(iparent)) < 0)
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iparent = -1;
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icells = 1;
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if (iparent != -1)
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OF_getprop(OF_xref_phandle(iparent), "#interrupt-cells",
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&icells, sizeof(icells));
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/*
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* Any AAPL,interrupts property gets priority and is
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* fully specified (i.e. does not need routing)
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*/
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isz = OF_getprop(node, "AAPL,interrupts", intr, sizeof(intr));
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if (isz == sizeof(intr[0])*icells)
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return ((iparent == -1) ? intr[0] : ofw_bus_map_intr(dev,
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iparent, icells, intr));
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isz = OF_getprop(node, "interrupts", intr, sizeof(intr));
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if (isz == sizeof(intr[0])*icells) {
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if (iparent != -1)
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intr[0] = ofw_bus_map_intr(dev, iparent, icells, intr);
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} else {
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/* No property: our best guess is the intpin. */
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intr[0] = pci_get_intpin(child);
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}
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/*
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* If we got intr from a property, it may or may not be an intpin.
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* For on-board devices, it frequently is not, and is completely out
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* of the valid intpin range. For PCI slots, it hopefully is,
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* otherwise we will have trouble interfacing with non-OFW buses
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* such as cardbus.
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* Since we cannot tell which it is without violating layering, we
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* will always use the route_interrupt method, and treat exceptions
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* on the level they become apparent.
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*/
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return (PCIB_ROUTE_INTERRUPT(device_get_parent(dev), child, intr[0]));
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}
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static const struct ofw_bus_devinfo *
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ofw_pcibus_get_devinfo(device_t bus, device_t dev)
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{
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struct ofw_pcibus_devinfo *dinfo;
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dinfo = device_get_ivars(dev);
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return (&dinfo->opd_obdinfo);
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}
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