30bbe52432
basically maps all of physical memory 1:1 to a range of virtual addresses outside of normal kva. The advantage of doing this instead of accessing phsyical addresses directly is that memory accesses will go through the data cache, and will participate in the normal cache coherency algorithm for invalidating lines in our own and in other cpus' data caches. So we don't have to flush the cache manually or send IPIs to do so on other cpus. Also, since the mappings never change, we don't have to flush them from the tlb manually. This makes pmap_copy_page and pmap_zero_page MP safe, allowing the idle zero proc to run outside of giant. Inspired by: ia64
122 lines
4.1 KiB
C
122 lines
4.1 KiB
C
/*
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* Copyright (c) 1991 Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* the Systems Programming Group of the University of Utah Computer
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* Science Department and William Jolitz of UUNET Technologies Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: hp300: @(#)pmap.h 7.2 (Berkeley) 12/16/90
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* from: @(#)pmap.h 7.4 (Berkeley) 5/12/91
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* from: FreeBSD: src/sys/i386/include/pmap.h,v 1.70 2000/11/30
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* $FreeBSD$
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*/
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#ifndef _MACHINE_PMAP_H_
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#define _MACHINE_PMAP_H_
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#include <machine/tte.h>
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#define DCACHE_COLOR_BITS (1)
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#define DCACHE_COLORS (1 << DCACHE_COLOR_BITS)
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#define DCACHE_COLOR_MASK (DCACHE_COLORS - 1)
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#define DCACHE_COLOR(va) (((va) >> PAGE_SHIFT) & DCACHE_COLOR_MASK)
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#define PMAP_CONTEXT_MAX 8192
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#define PG_UNCACHEABLE (1<<0)
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#define pmap_resident_count(pm) (pm->pm_stats.resident_count)
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typedef struct pmap *pmap_t;
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struct md_page {
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STAILQ_HEAD(, tte) tte_list;
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int colors[DCACHE_COLORS];
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int color;
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int flags;
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};
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struct pmap {
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struct tte *pm_tsb;
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vm_object_t pm_tsb_obj;
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u_int pm_active;
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u_int pm_context[MAXCPU];
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struct pmap_statistics pm_stats;
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};
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void pmap_bootstrap(vm_offset_t ekva);
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void pmap_context_rollover(void);
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vm_offset_t pmap_kextract(vm_offset_t va);
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void pmap_kenter_flags(vm_offset_t va, vm_offset_t pa, u_long flags);
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void pmap_kremove_flags(vm_offset_t va);
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void pmap_qenter_flags(vm_offset_t va, vm_page_t *m, int count, u_long fl);
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int pmap_cache_enter(vm_page_t m, vm_offset_t va);
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void pmap_cache_remove(vm_page_t m, vm_offset_t va);
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int pmap_remove_tte(struct pmap *pm1, struct pmap *pm2, struct tte *tp,
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vm_offset_t va);
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int pmap_protect_tte(struct pmap *pm1, struct pmap *pm2, struct tte *tp,
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vm_offset_t va);
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void pmap_map_tsb(void);
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void pmap_remove_all(vm_page_t m);
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void pmap_clear_write(vm_page_t m);
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#define vtophys(va) pmap_kextract(((vm_offset_t) (va)))
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extern vm_offset_t avail_start;
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extern vm_offset_t avail_end;
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extern struct pmap kernel_pmap_store;
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#define kernel_pmap (&kernel_pmap_store)
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extern vm_offset_t phys_avail[];
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extern vm_offset_t virtual_avail;
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extern vm_offset_t virtual_end;
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extern vm_offset_t kernel_page;
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extern int pmap_pagedaemon_waken;
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extern vm_offset_t msgbuf_phys;
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static __inline int
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pmap_track_modified(pmap_t pm, vm_offset_t va)
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{
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if (pm == kernel_pmap)
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return ((va < kmi.clean_sva) || (va >= kmi.clean_eva));
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else
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return (1);
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}
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#endif /* !_MACHINE_PMAP_H_ */
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