236 lines
6.7 KiB
C
236 lines
6.7 KiB
C
/* $FreeBSD$ */
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/*-
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* Copyright (c) 2005, 2006 Damien Bergamini <damien.bergamini@free.fr>
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* Copyright (c) 2006 Niall O'Higgins <niallo@openbsd.org>
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*
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* Permission to use, copy, modify, and distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#define RT2573_NOISE_FLOOR -95
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#define RT2573_TX_DESC_SIZE (sizeof (struct rum_tx_desc))
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#define RT2573_RX_DESC_SIZE (sizeof (struct rum_rx_desc))
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#define RT2573_CONFIG_NO 1
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#define RT2573_IFACE_INDEX 0
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#define RT2573_MCU_CNTL 0x01
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#define RT2573_WRITE_MAC 0x02
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#define RT2573_READ_MAC 0x03
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#define RT2573_WRITE_MULTI_MAC 0x06
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#define RT2573_READ_MULTI_MAC 0x07
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#define RT2573_READ_EEPROM 0x09
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#define RT2573_WRITE_LED 0x0a
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/*
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* Control and status registers.
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*/
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#define RT2573_AIFSN_CSR 0x0400
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#define RT2573_CWMIN_CSR 0x0404
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#define RT2573_CWMAX_CSR 0x0408
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#define RT2573_MCU_CODE_BASE 0x0800
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#define RT2573_HW_BEACON_BASE0 0x2400
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#define RT2573_MAC_CSR0 0x3000
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#define RT2573_MAC_CSR1 0x3004
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#define RT2573_MAC_CSR2 0x3008
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#define RT2573_MAC_CSR3 0x300c
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#define RT2573_MAC_CSR4 0x3010
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#define RT2573_MAC_CSR5 0x3014
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#define RT2573_MAC_CSR6 0x3018
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#define RT2573_MAC_CSR7 0x301c
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#define RT2573_MAC_CSR8 0x3020
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#define RT2573_MAC_CSR9 0x3024
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#define RT2573_MAC_CSR10 0x3028
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#define RT2573_MAC_CSR11 0x302c
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#define RT2573_MAC_CSR12 0x3030
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#define RT2573_MAC_CSR13 0x3034
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#define RT2573_MAC_CSR14 0x3038
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#define RT2573_MAC_CSR15 0x303c
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#define RT2573_TXRX_CSR0 0x3040
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#define RT2573_TXRX_CSR1 0x3044
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#define RT2573_TXRX_CSR2 0x3048
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#define RT2573_TXRX_CSR3 0x304c
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#define RT2573_TXRX_CSR4 0x3050
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#define RT2573_TXRX_CSR5 0x3054
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#define RT2573_TXRX_CSR6 0x3058
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#define RT2573_TXRX_CSR7 0x305c
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#define RT2573_TXRX_CSR8 0x3060
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#define RT2573_TXRX_CSR9 0x3064
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#define RT2573_TXRX_CSR10 0x3068
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#define RT2573_TXRX_CSR11 0x306c
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#define RT2573_TXRX_CSR12 0x3070
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#define RT2573_TXRX_CSR13 0x3074
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#define RT2573_TXRX_CSR14 0x3078
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#define RT2573_TXRX_CSR15 0x307c
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#define RT2573_PHY_CSR0 0x3080
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#define RT2573_PHY_CSR1 0x3084
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#define RT2573_PHY_CSR2 0x3088
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#define RT2573_PHY_CSR3 0x308c
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#define RT2573_PHY_CSR4 0x3090
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#define RT2573_PHY_CSR5 0x3094
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#define RT2573_PHY_CSR6 0x3098
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#define RT2573_PHY_CSR7 0x309c
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#define RT2573_SEC_CSR0 0x30a0
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#define RT2573_SEC_CSR1 0x30a4
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#define RT2573_SEC_CSR2 0x30a8
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#define RT2573_SEC_CSR3 0x30ac
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#define RT2573_SEC_CSR4 0x30b0
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#define RT2573_SEC_CSR5 0x30b4
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#define RT2573_STA_CSR0 0x30c0
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#define RT2573_STA_CSR1 0x30c4
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#define RT2573_STA_CSR2 0x30c8
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#define RT2573_STA_CSR3 0x30cc
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#define RT2573_STA_CSR4 0x30d0
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#define RT2573_STA_CSR5 0x30d4
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/* possible flags for register RT2573_MAC_CSR1 */
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#define RT2573_RESET_ASIC (1 << 0)
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#define RT2573_RESET_BBP (1 << 1)
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#define RT2573_HOST_READY (1 << 2)
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/* possible flags for register MAC_CSR5 */
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#define RT2573_ONE_BSSID 3
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/* possible flags for register TXRX_CSR0 */
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/* Tx filter flags are in the low 16 bits */
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#define RT2573_AUTO_TX_SEQ (1 << 15)
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/* Rx filter flags are in the high 16 bits */
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#define RT2573_DISABLE_RX (1 << 16)
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#define RT2573_DROP_CRC_ERROR (1 << 17)
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#define RT2573_DROP_PHY_ERROR (1 << 18)
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#define RT2573_DROP_CTL (1 << 19)
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#define RT2573_DROP_NOT_TO_ME (1 << 20)
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#define RT2573_DROP_TODS (1 << 21)
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#define RT2573_DROP_VER_ERROR (1 << 22)
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#define RT2573_DROP_MULTICAST (1 << 23)
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#define RT2573_DROP_BROADCAST (1 << 24)
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#define RT2573_DROP_ACKCTS (1 << 25)
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/* possible flags for register TXRX_CSR4 */
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#define RT2573_SHORT_PREAMBLE (1 << 18)
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#define RT2573_MRR_ENABLED (1 << 19)
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#define RT2573_MRR_CCK_FALLBACK (1 << 22)
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/* possible flags for register TXRX_CSR9 */
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#define RT2573_TSF_TICKING (1 << 16)
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#define RT2573_TSF_MODE(x) (((x) & 0x3) << 17)
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/* TBTT stands for Target Beacon Transmission Time */
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#define RT2573_ENABLE_TBTT (1 << 19)
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#define RT2573_GENERATE_BEACON (1 << 20)
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/* possible flags for register PHY_CSR0 */
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#define RT2573_PA_PE_2GHZ (1 << 16)
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#define RT2573_PA_PE_5GHZ (1 << 17)
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/* possible flags for register PHY_CSR3 */
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#define RT2573_BBP_READ (1 << 15)
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#define RT2573_BBP_BUSY (1 << 16)
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/* possible flags for register PHY_CSR4 */
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#define RT2573_RF_20BIT (20 << 24)
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#define RT2573_RF_BUSY (1 << 31)
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/* LED values */
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#define RT2573_LED_RADIO (1 << 8)
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#define RT2573_LED_G (1 << 9)
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#define RT2573_LED_A (1 << 10)
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#define RT2573_LED_ON 0x1e1e
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#define RT2573_LED_OFF 0x0
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#define RT2573_MCU_RUN (1 << 3)
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#define RT2573_SMART_MODE (1 << 0)
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#define RT2573_BBPR94_DEFAULT 6
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#define RT2573_BBP_WRITE (1 << 15)
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/* dual-band RF */
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#define RT2573_RF_5226 1
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#define RT2573_RF_5225 3
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/* single-band RF */
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#define RT2573_RF_2528 2
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#define RT2573_RF_2527 4
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#define RT2573_BBP_VERSION 0
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struct rum_tx_desc {
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uint32_t flags;
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#define RT2573_TX_BURST (1 << 0)
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#define RT2573_TX_VALID (1 << 1)
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#define RT2573_TX_MORE_FRAG (1 << 2)
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#define RT2573_TX_NEED_ACK (1 << 3)
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#define RT2573_TX_TIMESTAMP (1 << 4)
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#define RT2573_TX_OFDM (1 << 5)
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#define RT2573_TX_IFS_SIFS (1 << 6)
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#define RT2573_TX_LONG_RETRY (1 << 7)
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uint16_t wme;
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#define RT2573_QID(v) (v)
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#define RT2573_AIFSN(v) ((v) << 4)
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#define RT2573_LOGCWMIN(v) ((v) << 8)
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#define RT2573_LOGCWMAX(v) ((v) << 12)
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uint16_t xflags;
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#define RT2573_TX_HWSEQ (1 << 12)
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uint8_t plcp_signal;
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uint8_t plcp_service;
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#define RT2573_PLCP_LENGEXT 0x80
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uint8_t plcp_length_lo;
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uint8_t plcp_length_hi;
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uint32_t iv;
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uint32_t eiv;
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uint8_t offset;
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uint8_t qid;
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uint8_t txpower;
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#define RT2573_DEFAULT_TXPOWER 0
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uint8_t reserved;
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} __packed;
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struct rum_rx_desc {
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uint32_t flags;
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#define RT2573_RX_BUSY (1 << 0)
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#define RT2573_RX_DROP (1 << 1)
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#define RT2573_RX_CRC_ERROR (1 << 6)
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#define RT2573_RX_OFDM (1 << 7)
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uint8_t rate;
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uint8_t rssi;
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uint8_t reserved1;
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uint8_t offset;
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uint32_t iv;
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uint32_t eiv;
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uint32_t reserved2[2];
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} __packed;
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#define RT2573_RF1 0
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#define RT2573_RF2 2
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#define RT2573_RF3 1
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#define RT2573_RF4 3
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#define RT2573_EEPROM_MACBBP 0x0000
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#define RT2573_EEPROM_ADDRESS 0x0004
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#define RT2573_EEPROM_ANTENNA 0x0020
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#define RT2573_EEPROM_CONFIG2 0x0022
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#define RT2573_EEPROM_BBP_BASE 0x0026
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#define RT2573_EEPROM_TXPOWER 0x0046
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#define RT2573_EEPROM_FREQ_OFFSET 0x005e
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#define RT2573_EEPROM_RSSI_2GHZ_OFFSET 0x009a
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#define RT2573_EEPROM_RSSI_5GHZ_OFFSET 0x009c
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