b8c7cb30ab
is not enabled). Saved a few bytes by reusing the line control register bits and not loading the speed in the wrong (cpu) register.
182 lines
5.3 KiB
ArmAsm
182 lines
5.3 KiB
ArmAsm
/*
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* Mach Operating System
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* Copyright (c) 1992, 1991 Carnegie Mellon University
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* All Rights Reserved.
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*
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* Permission to use, copy, modify and distribute this software and its
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* documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
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* ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie Mellon
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* the rights to redistribute these changes.
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*
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* from: Mach, Revision 2.2 92/04/04 11:34:26 rpd
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* $Id: serial.S,v 1.10 1998/01/01 13:01:31 bde Exp $
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*/
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/*
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Copyright 1988, 1989, 1990, 1991, 1992
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by Intel Corporation, Santa Clara, California.
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All Rights Reserved
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Permission to use, copy, modify, and distribute this software and
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its documentation for any purpose and without fee is hereby
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granted, provided that the above copyright notice appears in all
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copies and that both the copyright notice and this permission notice
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appear in supporting documentation, and that the name of Intel
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not be used in advertising or publicity pertaining to distribution
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of the software without specific, written prior permission.
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INTEL DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
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INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS,
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IN NO EVENT SHALL INTEL BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
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CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
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LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
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NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
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WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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/*
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* Serial bootblock interface routines
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* Copyright (c) 1994, J"org Wunsch
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*
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* Permission to use, copy, modify and distribute this software and its
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* documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* THE AUTHOR ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. THE AUTHOR DISCLAIMS ANY LIABILITY OF ANY KIND FOR
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* ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*/
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.file "serial.S"
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#include <i386/isa/sioreg.h>
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#include "asm.h"
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.text
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/*
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* The serial port interface routines implement a simple polled i/o
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* interface to a standard serial port. Due to the space restrictions
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* for the boot blocks, no BIOS support is used (since BIOS requires
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* expensive real/protected mode switches), instead the rudimentary
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* BIOS support is duplicated here.
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*
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* The base address and speed for the i/o port are passed from the
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* Makefile in the COMCONSOLE and CONSPEED preprocessor macros. The
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* line control parameters are currently hard-coded to 8 bits, no
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* parity, 1 stop bit (8N1). This can be changed in init_serial().
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*/
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/*
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* void serial_putc(int ch);
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* Write character `ch' to port COMCONSOLE.
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*/
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ENTRY(serial_putc)
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movl $10000, %ecx # timeout
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movl $COMCONSOLE + 5, %edx # line status reg
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1:
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decl %ecx
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je 2f
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inb %dx, %al
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testb $0x20, %al
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je 1b # TX buffer not empty
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movb 4(%esp), %al
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subl $5, %edx # TX output reg
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outb %al, %dx # send this one
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2:
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ret
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/*
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* int serial_getc(void);
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* Read a character from port COMCONSOLE.
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*/
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ENTRY(serial_getc)
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mov $COMCONSOLE + 5, %edx # line status reg
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1:
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inb %dx, %al
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testb $0x01, %al
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je 1b # no rx char available
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xorl %eax, %eax
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subl $5, %edx # rx buffer reg
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inb %dx, %al # fetch (first) character
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andb $0x7F, %al # remove any parity bits we get
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cmpb $0x7F, %al # make DEL...
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jne 2f
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movb $0x08, %al # look like BS
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2:
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ret
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/*
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* int serial_ischar(void);
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* If there is a character in the input buffer of port COMCONSOLE,
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* return nonzero; otherwise return 0.
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*/
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ENTRY(serial_ischar)
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xorl %eax, %eax
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movl $COMCONSOLE + 5, %edx # line status reg
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inb %dx, %al
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andb $0x01, %al # rx char available?
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ret
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/*
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* void init_serial(void);
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* Initialize port COMCONSOLE to speed CONSPEED, line settings 8N1.
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*/
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ENTRY(init_serial)
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movl $COMCONSOLE + 3, %edx # line control reg
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movb $0x80, %al
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outb %al, %dx # enable DLAB
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subl $3, %edx # divisor latch, low byte
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movb $COMBRD(CONSPEED) & 0xff, %al
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outb %al, %dx
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incl %edx # divisor latch, high byte
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movb $COMBRD(CONSPEED) >> 8, %al
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outb %al, %dx
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incl %edx # fifo control register (if any)
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xorl %eax,%eax
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outb %al, %dx # disable fifo to reduce worst-case busy-wait
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incl %edx # line control reg
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movb $0x03, %al
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outb %al, %dx # 8N1
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incl %edx # modem control reg
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outb %al, %dx # enable DTR/RTS
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/* Flush the input buffer. */
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incl %edx # line status reg
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1:
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subl $5, %edx # rx buffer reg
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inb %dx, %al # throw away (unconditionally the first time)
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addl $5, %edx # line status reg
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inb %dx, %al
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testb $0x01, %al
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jne 1b # more
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ret
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