588 lines
14 KiB
C
588 lines
14 KiB
C
/*-
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* Copyright (C) 1996 Wolfgang Solfrank.
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* Copyright (C) 1996 TooLs GmbH.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by TooLs GmbH.
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* 4. The name of TooLs GmbH may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $NetBSD: ofw_machdep.c,v 1.5 2000/05/23 13:25:43 tsubai Exp $
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/systm.h>
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#include <sys/conf.h>
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#include <sys/disk.h>
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#include <sys/fcntl.h>
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#include <sys/malloc.h>
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#include <sys/smp.h>
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#include <sys/stat.h>
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#include <net/ethernet.h>
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_pci.h>
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#include <dev/ofw/ofw_bus.h>
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#include <vm/vm.h>
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#include <vm/vm_param.h>
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#include <vm/vm_page.h>
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#include <machine/bus.h>
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#include <machine/cpu.h>
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#include <machine/md_var.h>
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#include <machine/platform.h>
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#include <machine/ofw_machdep.h>
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#include <machine/trap.h>
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#ifdef AIM
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extern register_t ofmsr[5];
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extern void *openfirmware_entry;
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static void *fdt;
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int ofw_real_mode;
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extern char save_trap_init[0x2f00]; /* EXC_LAST */
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char save_trap_of[0x2f00]; /* EXC_LAST */
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int ofwcall(void *);
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static int openfirmware(void *args);
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__inline void
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ofw_save_trap_vec(char *save_trap_vec)
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{
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if (!ofw_real_mode)
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return;
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bcopy((void *)EXC_RST, save_trap_vec, EXC_LAST - EXC_RST);
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}
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static __inline void
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ofw_restore_trap_vec(char *restore_trap_vec)
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{
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if (!ofw_real_mode)
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return;
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bcopy(restore_trap_vec, (void *)EXC_RST, EXC_LAST - EXC_RST);
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__syncicache(EXC_RSVD, EXC_LAST - EXC_RSVD);
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}
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/*
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* Saved SPRG0-3 from OpenFirmware. Will be restored prior to the callback.
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*/
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register_t ofw_sprg0_save;
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static __inline void
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ofw_sprg_prepare(void)
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{
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if (ofw_real_mode)
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return;
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/*
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* Assume that interrupt are disabled at this point, or
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* SPRG1-3 could be trashed
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*/
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__asm __volatile("mfsprg0 %0\n\t"
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"mtsprg0 %1\n\t"
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"mtsprg1 %2\n\t"
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"mtsprg2 %3\n\t"
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"mtsprg3 %4\n\t"
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: "=&r"(ofw_sprg0_save)
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: "r"(ofmsr[1]),
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"r"(ofmsr[2]),
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"r"(ofmsr[3]),
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"r"(ofmsr[4]));
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}
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static __inline void
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ofw_sprg_restore(void)
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{
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if (ofw_real_mode)
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return;
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/*
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* Note that SPRG1-3 contents are irrelevant. They are scratch
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* registers used in the early portion of trap handling when
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* interrupts are disabled.
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*
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* PCPU data cannot be used until this routine is called !
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*/
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__asm __volatile("mtsprg0 %0" :: "r"(ofw_sprg0_save));
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}
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#endif
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static int
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parse_ofw_memory(phandle_t node, const char *prop, struct mem_region *output)
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{
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cell_t address_cells, size_cells;
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cell_t OFmem[4 * PHYS_AVAIL_SZ];
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int sz, i, j;
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int apple_hack_mode;
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phandle_t phandle;
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sz = 0;
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apple_hack_mode = 0;
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/*
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* Get #address-cells from root node, defaulting to 1 if it cannot
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* be found.
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*/
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phandle = OF_finddevice("/");
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if (OF_getprop(phandle, "#address-cells", &address_cells,
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sizeof(address_cells)) < (ssize_t)sizeof(address_cells))
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address_cells = 1;
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if (OF_getprop(phandle, "#size-cells", &size_cells,
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sizeof(size_cells)) < (ssize_t)sizeof(size_cells))
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size_cells = 1;
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/*
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* Get memory.
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*/
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if (node == -1 || (sz = OF_getprop(node, prop,
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OFmem, sizeof(OFmem))) <= 0)
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panic("Physical memory map not found");
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i = 0;
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j = 0;
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while (i < sz/sizeof(cell_t)) {
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#ifndef __powerpc64__
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/* On 32-bit PPC, ignore regions starting above 4 GB */
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if (address_cells > 1 && OFmem[i] > 0) {
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i += address_cells + size_cells;
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continue;
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}
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#endif
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output[j].mr_start = OFmem[i++];
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if (address_cells == 2) {
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#ifdef __powerpc64__
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output[j].mr_start <<= 32;
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#endif
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output[j].mr_start += OFmem[i++];
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}
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output[j].mr_size = OFmem[i++];
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if (size_cells == 2) {
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#ifdef __powerpc64__
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output[j].mr_size <<= 32;
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#endif
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output[j].mr_size += OFmem[i++];
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}
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#ifndef __powerpc64__
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/*
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* Check for memory regions extending above 32-bit
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* memory space, and restrict them to stay there.
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*/
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if (((uint64_t)output[j].mr_start +
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(uint64_t)output[j].mr_size) >
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BUS_SPACE_MAXADDR_32BIT) {
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output[j].mr_size = BUS_SPACE_MAXADDR_32BIT -
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output[j].mr_start;
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}
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#endif
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j++;
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}
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sz = j*sizeof(output[0]);
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return (sz);
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}
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/*
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* This is called during powerpc_init, before the system is really initialized.
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* It shall provide the total and the available regions of RAM.
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* Both lists must have a zero-size entry as terminator.
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* The available regions need not take the kernel into account, but needs
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* to provide space for two additional entry beyond the terminating one.
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*/
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void
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ofw_mem_regions(struct mem_region *memp, int *memsz,
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struct mem_region *availp, int *availsz)
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{
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phandle_t phandle;
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int asz, msz;
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int res;
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char name[31];
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asz = msz = 0;
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/*
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* Get memory from all the /memory nodes.
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*/
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for (phandle = OF_child(OF_peer(0)); phandle != 0;
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phandle = OF_peer(phandle)) {
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if (OF_getprop(phandle, "name", name, sizeof(name)) <= 0)
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continue;
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if (strncmp(name, "memory", sizeof(name)) != 0)
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continue;
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res = parse_ofw_memory(phandle, "reg", &memp[msz]);
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msz += res/sizeof(struct mem_region);
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if (OF_getproplen(phandle, "available") >= 0)
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res = parse_ofw_memory(phandle, "available",
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&availp[asz]);
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else
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res = parse_ofw_memory(phandle, "reg", &availp[asz]);
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asz += res/sizeof(struct mem_region);
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}
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*memsz = msz;
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*availsz = asz;
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}
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#ifdef AIM
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void
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OF_initial_setup(void *fdt_ptr, void *junk, int (*openfirm)(void *))
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{
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if (ofmsr[0] & PSL_DR)
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ofw_real_mode = 0;
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else
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ofw_real_mode = 1;
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fdt = fdt_ptr;
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#ifdef FDT_DTB_STATIC
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/* Check for a statically included blob */
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if (fdt == NULL)
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fdt = &fdt_static_dtb;
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#endif
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}
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boolean_t
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OF_bootstrap()
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{
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boolean_t status = FALSE;
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if (openfirmware_entry != NULL) {
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if (ofw_real_mode) {
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status = OF_install(OFW_STD_REAL, 0);
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} else {
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#ifdef __powerpc64__
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status = OF_install(OFW_STD_32BIT, 0);
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#else
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status = OF_install(OFW_STD_DIRECT, 0);
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#endif
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}
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if (status != TRUE)
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return status;
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OF_init(openfirmware);
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} else if (fdt != NULL) {
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status = OF_install(OFW_FDT, 0);
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if (status != TRUE)
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return status;
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OF_init(fdt);
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}
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return (status);
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}
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void
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ofw_quiesce(void)
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{
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struct {
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cell_t name;
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cell_t nargs;
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cell_t nreturns;
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} args;
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KASSERT(!pmap_bootstrapped, ("Cannot call ofw_quiesce after VM is up"));
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args.name = (cell_t)(uintptr_t)"quiesce";
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args.nargs = 0;
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args.nreturns = 0;
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openfirmware(&args);
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}
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static int
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openfirmware_core(void *args)
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{
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int result;
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register_t oldmsr;
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/*
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* Turn off exceptions - we really don't want to end up
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* anywhere unexpected with PCPU set to something strange
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* or the stack pointer wrong.
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*/
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oldmsr = intr_disable();
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ofw_sprg_prepare();
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/* Save trap vectors */
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ofw_save_trap_vec(save_trap_of);
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/* Restore initially saved trap vectors */
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ofw_restore_trap_vec(save_trap_init);
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#if defined(AIM) && !defined(__powerpc64__)
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/*
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* Clear battable[] translations
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*/
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if (!(cpu_features & PPC_FEATURE_64))
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__asm __volatile("mtdbatu 2, %0\n"
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"mtdbatu 3, %0" : : "r" (0));
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isync();
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#endif
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result = ofwcall(args);
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/* Restore trap vecotrs */
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ofw_restore_trap_vec(save_trap_of);
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ofw_sprg_restore();
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intr_restore(oldmsr);
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return (result);
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}
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#ifdef SMP
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struct ofw_rv_args {
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void *args;
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int retval;
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volatile int in_progress;
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};
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static void
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ofw_rendezvous_dispatch(void *xargs)
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{
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struct ofw_rv_args *rv_args = xargs;
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/* NOTE: Interrupts are disabled here */
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if (PCPU_GET(cpuid) == 0) {
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/*
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* Execute all OF calls on CPU 0
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*/
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rv_args->retval = openfirmware_core(rv_args->args);
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rv_args->in_progress = 0;
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} else {
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/*
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* Spin with interrupts off on other CPUs while OF has
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* control of the machine.
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*/
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while (rv_args->in_progress)
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cpu_spinwait();
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}
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}
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#endif
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static int
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openfirmware(void *args)
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{
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int result;
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#ifdef SMP
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struct ofw_rv_args rv_args;
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rv_args.args = args;
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rv_args.in_progress = 1;
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smp_rendezvous(smp_no_rendevous_barrier, ofw_rendezvous_dispatch,
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smp_no_rendevous_barrier, &rv_args);
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result = rv_args.retval;
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#else
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result = openfirmware_core(args);
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#endif
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return (result);
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}
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void
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OF_reboot()
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{
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struct {
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cell_t name;
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cell_t nargs;
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cell_t nreturns;
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cell_t arg;
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} args;
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args.name = (cell_t)(uintptr_t)"interpret";
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args.nargs = 1;
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args.nreturns = 0;
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args.arg = (cell_t)(uintptr_t)"reset-all";
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openfirmware_core(&args); /* Don't do rendezvous! */
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for (;;); /* just in case */
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}
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#endif /* AIM */
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void
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OF_getetheraddr(device_t dev, u_char *addr)
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{
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phandle_t node;
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node = ofw_bus_get_node(dev);
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OF_getprop(node, "local-mac-address", addr, ETHER_ADDR_LEN);
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}
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/*
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* Return a bus handle and bus tag that corresponds to the register
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* numbered regno for the device referenced by the package handle
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* dev. This function is intended to be used by console drivers in
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* early boot only. It works by mapping the address of the device's
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* register in the address space of its parent and recursively walk
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* the device tree upward this way.
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*/
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static void
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OF_get_addr_props(phandle_t node, uint32_t *addrp, uint32_t *sizep, int *pcip)
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{
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char type[64];
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uint32_t addr, size;
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int pci, res;
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res = OF_getprop(node, "#address-cells", &addr, sizeof(addr));
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if (res == -1)
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addr = 2;
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res = OF_getprop(node, "#size-cells", &size, sizeof(size));
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if (res == -1)
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size = 1;
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pci = 0;
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if (addr == 3 && size == 2) {
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res = OF_getprop(node, "device_type", type, sizeof(type));
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if (res != -1) {
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type[sizeof(type) - 1] = '\0';
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pci = (strcmp(type, "pci") == 0) ? 1 : 0;
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}
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}
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if (addrp != NULL)
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*addrp = addr;
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if (sizep != NULL)
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*sizep = size;
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if (pcip != NULL)
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*pcip = pci;
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}
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int
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OF_decode_addr(phandle_t dev, int regno, bus_space_tag_t *tag,
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bus_space_handle_t *handle)
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{
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uint32_t cell[32];
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bus_addr_t addr, raddr, baddr;
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bus_size_t size, rsize;
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uint32_t c, nbridge, naddr, nsize;
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phandle_t bridge, parent;
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u_int spc, rspc, prefetch;
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int pci, pcib, res;
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/* Sanity checking. */
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if (dev == 0)
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return (EINVAL);
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bridge = OF_parent(dev);
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if (bridge == 0)
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return (EINVAL);
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if (regno < 0)
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return (EINVAL);
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if (tag == NULL || handle == NULL)
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return (EINVAL);
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/* Assume big-endian unless we find a PCI device */
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*tag = &bs_be_tag;
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/* Get the requested register. */
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OF_get_addr_props(bridge, &naddr, &nsize, &pci);
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if (pci)
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*tag = &bs_le_tag;
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res = OF_getprop(dev, (pci) ? "assigned-addresses" : "reg",
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cell, sizeof(cell));
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if (res == -1)
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return (ENXIO);
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if (res % sizeof(cell[0]))
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return (ENXIO);
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res /= sizeof(cell[0]);
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regno *= naddr + nsize;
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if (regno + naddr + nsize > res)
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return (EINVAL);
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spc = (pci) ? cell[regno] & OFW_PCI_PHYS_HI_SPACEMASK : ~0;
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prefetch = (pci) ? cell[regno] & OFW_PCI_PHYS_HI_PREFETCHABLE : 0;
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addr = 0;
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for (c = 0; c < naddr; c++)
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addr = ((uint64_t)addr << 32) | cell[regno++];
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size = 0;
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for (c = 0; c < nsize; c++)
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size = ((uint64_t)size << 32) | cell[regno++];
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/*
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* Map the address range in the bridge's decoding window as given
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* by the "ranges" property. If a node doesn't have such property
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* then no mapping is done.
|
|
*/
|
|
parent = OF_parent(bridge);
|
|
while (parent != 0) {
|
|
OF_get_addr_props(parent, &nbridge, NULL, &pcib);
|
|
if (pcib)
|
|
*tag = &bs_le_tag;
|
|
res = OF_getprop(bridge, "ranges", cell, sizeof(cell));
|
|
if (res == -1)
|
|
goto next;
|
|
if (res % sizeof(cell[0]))
|
|
return (ENXIO);
|
|
res /= sizeof(cell[0]);
|
|
regno = 0;
|
|
while (regno < res) {
|
|
rspc = (pci)
|
|
? cell[regno] & OFW_PCI_PHYS_HI_SPACEMASK
|
|
: ~0;
|
|
if (rspc != spc) {
|
|
regno += naddr + nbridge + nsize;
|
|
continue;
|
|
}
|
|
raddr = 0;
|
|
for (c = 0; c < naddr; c++)
|
|
raddr = ((uint64_t)raddr << 32) | cell[regno++];
|
|
rspc = (pcib)
|
|
? cell[regno] & OFW_PCI_PHYS_HI_SPACEMASK
|
|
: ~0;
|
|
baddr = 0;
|
|
for (c = 0; c < nbridge; c++)
|
|
baddr = ((uint64_t)baddr << 32) | cell[regno++];
|
|
rsize = 0;
|
|
for (c = 0; c < nsize; c++)
|
|
rsize = ((uint64_t)rsize << 32) | cell[regno++];
|
|
if (addr < raddr || addr >= raddr + rsize)
|
|
continue;
|
|
addr = addr - raddr + baddr;
|
|
if (rspc != ~0)
|
|
spc = rspc;
|
|
}
|
|
|
|
next:
|
|
bridge = parent;
|
|
parent = OF_parent(bridge);
|
|
OF_get_addr_props(bridge, &naddr, &nsize, &pci);
|
|
}
|
|
|
|
return (bus_space_map(*tag, addr, size,
|
|
prefetch ? BUS_SPACE_MAP_PREFETCHABLE : 0, handle));
|
|
}
|
|
|