Andrew Turner 907fe11655 Update of the Allwinner drivers to: ... * Use the Linux compat string * Use EARLY_DRIVER_MODULE to attach at the right time * Add a generic A10 kernel config file * A20 now use generic_timer * Add two new dts files for Olimex boards * Update our custom DTS file for A10 and A20 to use the same compatible property names as the vendor ones. Submitted by: Emmanuel Vadot <manu@bidouilliste.com> Differential Revision: https://reviews.freebsd.org/D4792		2016-02-10 09:19:29 +00:00
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allwinner	Update of the Allwinner drivers to:	2016-02-10 09:19:29 +00:00
altera/socfpga	ARM: Use new ARMv6 naming conventions for cache and TLB functions	2016-02-05 14:57:41 +00:00
amlogic/aml8726	ARM: Use new ARMv6 naming conventions for cache and TLB functions	2016-02-05 14:57:41 +00:00
annapurna/alpine	Remove all remaining references to old and not more used struct	2016-02-02 10:32:45 +00:00
arm	Include sys/_task.h into uma_int.h, so that taskqueue.h isn't a	2016-02-09 20:22:35 +00:00
at91	ARM: Consistently use cpu_setttb() instead of setttb().	2016-02-03 16:44:06 +00:00
broadcom/bcm2835	ARM: Use new ARMv6 naming conventions for cache and TLB functions	2016-02-05 14:57:41 +00:00
cavium/cns11xx	ARM: Consistently use cpu_setttb() instead of setttb().	2016-02-03 16:44:06 +00:00
conf	Update of the Allwinner drivers to:	2016-02-10 09:19:29 +00:00
freescale	ARM: Use new ARMv6 naming conventions for cache and TLB functions	2016-02-05 14:57:41 +00:00
include	Break out the shared bits of the arm intrng definitions into sys/intr.h;	2016-02-10 04:43:08 +00:00
lpc	Remove the arm KERNPHYSADDR option as it is no longer used. The make	2015-12-22 09:08:21 +00:00
mv	ARM: Use new ARMv6 naming conventions for cache and TLB functions	2016-02-05 14:57:41 +00:00
qemu	[intrng] Migrate the intrng code from sys/arm/arm to sys/kern/subr_intr.c.	2015-12-18 05:43:59 +00:00
rockchip	ARM: Use new ARMv6 naming conventions for cache and TLB functions	2016-02-05 14:57:41 +00:00
samsung/exynos	ARM: Use new ARMv6 naming conventions for cache and TLB functions	2016-02-05 14:57:41 +00:00
ti	ARM: Use new ARMv6 naming conventions for cache and TLB functions	2016-02-05 14:57:41 +00:00
versatile	Remove all remaining references to old and not more used struct	2016-02-02 10:32:45 +00:00
xilinx	ARM: Use new ARMv6 naming conventions for cache and TLB functions	2016-02-05 14:57:41 +00:00
xscale	ARM: Consistently use cpu_setttb() instead of setttb().	2016-02-03 16:44:06 +00:00