e113789bdc
work in FreeBSD. This is still heavily a work in progress but I'd rather it start shipping in -HEAD sooner rather than later. This doesn't (yet) link it into the build system either for a static kernel or as a module; that will come later (after many, many make universe tests.)
196 lines
6.9 KiB
C
196 lines
6.9 KiB
C
/*
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* Copyright (c) 2013 Qualcomm Atheros, Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH
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* REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
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* AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT,
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* INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
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* LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
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* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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* PERFORMANCE OF THIS SOFTWARE.
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*/
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#include "opt_ah.h"
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#include "ah.h"
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#include "ah_internal.h"
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#include "ar9300/ar9300.h"
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#include "ar9300/ar9300reg.h"
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#define TU_TO_USEC(_tu) ((_tu) << 10)
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#define ONE_EIGHTH_TU_TO_USEC(_tu8) ((_tu8) << 7)
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extern u_int32_t ar9300_num_tx_pending(struct ath_hal *ah, u_int q);
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/*
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* Initializes all of the hardware registers used to
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* send beacons. Note that for station operation the
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* driver calls ar9300_set_sta_beacon_timers instead.
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*/
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void
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ar9300_beacon_init(struct ath_hal *ah,
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u_int32_t next_beacon, u_int32_t beacon_period, HAL_OPMODE opmode)
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{
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u_int32_t beacon_period_usec;
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HALASSERT(opmode == HAL_M_IBSS || opmode == HAL_M_HOSTAP);
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if (opmode == HAL_M_IBSS) {
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OS_REG_SET_BIT(ah, AR_TXCFG, AR_TXCFG_ADHOC_BEACON_ATIM_TX_POLICY);
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}
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OS_REG_WRITE(ah, AR_NEXT_TBTT_TIMER, ONE_EIGHTH_TU_TO_USEC(next_beacon));
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OS_REG_WRITE(ah, AR_NEXT_DMA_BEACON_ALERT,
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(ONE_EIGHTH_TU_TO_USEC(next_beacon) -
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ah->ah_config.ah_dma_beacon_response_time));
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OS_REG_WRITE(ah, AR_NEXT_SWBA,
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(ONE_EIGHTH_TU_TO_USEC(next_beacon) -
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ah->ah_config.ah_sw_beacon_response_time));
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beacon_period_usec =
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ONE_EIGHTH_TU_TO_USEC(beacon_period & HAL_BEACON_PERIOD_TU8);
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OS_REG_WRITE(ah, AR_BEACON_PERIOD, beacon_period_usec);
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OS_REG_WRITE(ah, AR_DMA_BEACON_PERIOD, beacon_period_usec);
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OS_REG_WRITE(ah, AR_SWBA_PERIOD, beacon_period_usec);
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/* reset TSF if required */
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if (beacon_period & HAL_BEACON_RESET_TSF) {
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ar9300_reset_tsf(ah);
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}
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/* enable timers */
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OS_REG_SET_BIT(ah, AR_TIMER_MODE,
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AR_TBTT_TIMER_EN | AR_DBA_TIMER_EN | AR_SWBA_TIMER_EN);
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}
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/*
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* Set all the beacon related bits on the h/w for stations
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* i.e. initializes the corresponding h/w timers;
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*/
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void
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ar9300_set_sta_beacon_timers(struct ath_hal *ah, const HAL_BEACON_STATE *bs)
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{
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u_int32_t next_tbtt, beaconintval, dtimperiod, beacontimeout;
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HAL_CAPABILITIES *p_cap = &AH_PRIVATE(ah)->ah_caps;
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HALASSERT(bs->bs_intval != 0);
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/* no cfp setting since h/w automatically takes care */
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OS_REG_WRITE(ah, AR_NEXT_TBTT_TIMER, TU_TO_USEC(bs->bs_nexttbtt));
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/*
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* Start the beacon timers by setting the BEACON register
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* to the beacon interval; no need to write tim offset since
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* h/w parses IEs.
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*/
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OS_REG_WRITE(ah, AR_BEACON_PERIOD,
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TU_TO_USEC(bs->bs_intval & HAL_BEACON_PERIOD));
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OS_REG_WRITE(ah, AR_DMA_BEACON_PERIOD,
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TU_TO_USEC(bs->bs_intval & HAL_BEACON_PERIOD));
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/*
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* Configure the BMISS interrupt. Note that we
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* assume the caller blocks interrupts while enabling
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* the threshold.
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*/
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HALASSERT(bs->bs_bmissthreshold <=
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(AR_RSSI_THR_BM_THR >> AR_RSSI_THR_BM_THR_S));
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OS_REG_RMW_FIELD(ah, AR_RSSI_THR,
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AR_RSSI_THR_BM_THR, bs->bs_bmissthreshold);
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/*
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* Program the sleep registers to correlate with the beacon setup.
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*/
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/*
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* Current implementation assumes sw processing of beacons -
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* assuming an interrupt is generated every beacon which
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* causes the hardware to become awake until the sw tells
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* it to go to sleep again; beacon timeout is to allow for
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* beacon jitter; cab timeout is max time to wait for cab
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* after seeing the last DTIM or MORE CAB bit
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*/
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#define CAB_TIMEOUT_VAL 10 /* in TU */
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#define BEACON_TIMEOUT_VAL 10 /* in TU */
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#define MIN_BEACON_TIMEOUT_VAL 1 /* in 1/8 TU */
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#define SLEEP_SLOP 3 /* in TU */
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/*
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* For max powersave mode we may want to sleep for longer than a
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* beacon period and not want to receive all beacons; modify the
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* timers accordingly; make sure to align the next TIM to the
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* next DTIM if we decide to wake for DTIMs only
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*/
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beaconintval = bs->bs_intval & HAL_BEACON_PERIOD;
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HALASSERT(beaconintval != 0);
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if (bs->bs_sleepduration > beaconintval) {
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HALASSERT(roundup(bs->bs_sleepduration, beaconintval) ==
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bs->bs_sleepduration);
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beaconintval = bs->bs_sleepduration;
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}
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dtimperiod = bs->bs_dtimperiod;
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if (bs->bs_sleepduration > dtimperiod) {
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HALASSERT(dtimperiod == 0 ||
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roundup(bs->bs_sleepduration, dtimperiod) ==
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bs->bs_sleepduration);
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dtimperiod = bs->bs_sleepduration;
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}
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HALASSERT(beaconintval <= dtimperiod);
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if (beaconintval == dtimperiod) {
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next_tbtt = bs->bs_nextdtim;
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} else {
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next_tbtt = bs->bs_nexttbtt;
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}
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HALDEBUG(ah, HAL_DEBUG_BEACON,
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"%s: next DTIM %d\n", __func__, bs->bs_nextdtim);
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HALDEBUG(ah, HAL_DEBUG_BEACON,
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"%s: next beacon %d\n", __func__, next_tbtt);
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HALDEBUG(ah, HAL_DEBUG_BEACON,
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"%s: beacon period %d\n", __func__, beaconintval);
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HALDEBUG(ah, HAL_DEBUG_BEACON,
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"%s: DTIM period %d\n", __func__, dtimperiod);
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OS_REG_WRITE(ah, AR_NEXT_DTIM, TU_TO_USEC(bs->bs_nextdtim - SLEEP_SLOP));
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OS_REG_WRITE(ah, AR_NEXT_TIM, TU_TO_USEC(next_tbtt - SLEEP_SLOP));
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/* cab timeout is now in 1/8 TU */
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OS_REG_WRITE(ah, AR_SLEEP1,
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SM((CAB_TIMEOUT_VAL << 3), AR_SLEEP1_CAB_TIMEOUT)
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| AR_SLEEP1_ASSUME_DTIM);
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/* beacon timeout is now in 1/8 TU */
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if (p_cap->halAutoSleepSupport) {
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beacontimeout = (BEACON_TIMEOUT_VAL << 3);
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} else {
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/*
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* Use a very small value to make sure the timeout occurs before
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* the TBTT. In this case the chip will not go back to sleep
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* automatically, instead it will wait for the SW to explicitly
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* set it to that mode.
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*/
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beacontimeout = MIN_BEACON_TIMEOUT_VAL;
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}
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OS_REG_WRITE(ah, AR_SLEEP2,
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SM(beacontimeout, AR_SLEEP2_BEACON_TIMEOUT));
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OS_REG_WRITE(ah, AR_TIM_PERIOD, TU_TO_USEC(beaconintval));
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OS_REG_WRITE(ah, AR_DTIM_PERIOD, TU_TO_USEC(dtimperiod));
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/* clear HOST AP related timers first */
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OS_REG_CLR_BIT(ah, AR_TIMER_MODE, (AR_DBA_TIMER_EN | AR_SWBA_TIMER_EN));
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OS_REG_SET_BIT(ah, AR_TIMER_MODE, AR_TBTT_TIMER_EN | AR_TIM_TIMER_EN
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| AR_DTIM_TIMER_EN);
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/* TSF out of range threshold */
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OS_REG_WRITE(ah, AR_TSFOOR_THRESHOLD, bs->bs_tsfoor_threshold);
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#undef CAB_TIMEOUT_VAL
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#undef BEACON_TIMEOUT_VAL
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#undef SLEEP_SLOP
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}
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