92fed30a07
These are called through function pointers so that different implementations can be provided for cheetah, where the block load instructions may or may not be a win, and so they can be disabled with the machdep.use_vis tunable. In terms of raw bandwidth the integer versions are faster, but not allocating lines in the L2 cache for useless data gives a measurable improvement in user time for the benchmarks I tested (mostly buildworld with -j8). As far as I can tell the instructions used are implemented on everything back to UltraSPARC I, so there should not be a problem with different cpu types. |
||
---|---|---|
.. | ||
central | ||
compile | ||
conf | ||
ebus | ||
fhc | ||
include | ||
isa | ||
pci | ||
sbus | ||
sparc64 |