553 lines
14 KiB
C
553 lines
14 KiB
C
/*-
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* Copyright (c) 1991 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* William Jolitz.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: @(#)isa.c 7.2 (Berkeley) 5/13/91
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* code to manage AT bus
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*
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* 92/08/18 Frank P. MacLachlan (fpm@crash.cts.com):
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* Fixed uninitialized variable problem and added code to deal
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* with DMA page boundaries in isa_dmarangecheck(). Fixed word
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* mode DMA count compution and reorganized DMA setup code in
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* isa_dmastart()
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/lock.h>
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#include <sys/proc.h>
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#include <sys/mutex.h>
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#include <sys/module.h>
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#include <vm/vm.h>
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#include <vm/vm_param.h>
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#include <vm/pmap.h>
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#include <amd64/isa/isa.h>
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#include <dev/ic/i8237.h>
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#include <isa/isavar.h>
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/*
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** Register definitions for DMA controller 1 (channels 0..3):
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*/
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#define DMA1_CHN(c) (IO_DMA1 + 1*(2*(c))) /* addr reg for channel c */
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#define DMA1_SMSK (IO_DMA1 + 1*10) /* single mask register */
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#define DMA1_MODE (IO_DMA1 + 1*11) /* mode register */
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#define DMA1_FFC (IO_DMA1 + 1*12) /* clear first/last FF */
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/*
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** Register definitions for DMA controller 2 (channels 4..7):
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*/
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#define DMA2_CHN(c) (IO_DMA2 + 2*(2*(c))) /* addr reg for channel c */
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#define DMA2_SMSK (IO_DMA2 + 2*10) /* single mask register */
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#define DMA2_MODE (IO_DMA2 + 2*11) /* mode register */
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#define DMA2_FFC (IO_DMA2 + 2*12) /* clear first/last FF */
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#define ISARAM_END 0x1000000
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static int isa_dmarangecheck(caddr_t va, u_int length, int chan);
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static caddr_t dma_bouncebuf[8];
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static u_int dma_bouncebufsize[8];
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static u_int8_t dma_bounced = 0;
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static u_int8_t dma_busy = 0; /* Used in isa_dmastart() */
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static u_int8_t dma_inuse = 0; /* User for acquire/release */
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static u_int8_t dma_auto_mode = 0;
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#define VALID_DMA_MASK (7)
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/* high byte of address is stored in this port for i-th dma channel */
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static int dmapageport[8] = { 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a };
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/*
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* Setup a DMA channel's bounce buffer.
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*/
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void
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isa_dmainit(chan, bouncebufsize)
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int chan;
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u_int bouncebufsize;
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{
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void *buf;
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#ifdef DIAGNOSTIC
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if (chan & ~VALID_DMA_MASK)
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panic("isa_dmainit: channel out of range");
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if (dma_bouncebuf[chan] != NULL)
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panic("isa_dmainit: impossible request");
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#endif
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dma_bouncebufsize[chan] = bouncebufsize;
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/* Try malloc() first. It works better if it works. */
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buf = malloc(bouncebufsize, M_DEVBUF, M_NOWAIT);
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if (buf != NULL) {
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if (isa_dmarangecheck(buf, bouncebufsize, chan) == 0) {
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dma_bouncebuf[chan] = buf;
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return;
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}
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free(buf, M_DEVBUF);
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}
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buf = contigmalloc(bouncebufsize, M_DEVBUF, M_NOWAIT, 0ul, 0xfffffful,
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1ul, chan & 4 ? 0x20000ul : 0x10000ul);
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if (buf == NULL)
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printf("isa_dmainit(%d, %d) failed\n", chan, bouncebufsize);
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else
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dma_bouncebuf[chan] = buf;
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}
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/*
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* Register a DMA channel's usage. Usually called from a device driver
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* in open() or during its initialization.
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*/
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int
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isa_dma_acquire(chan)
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int chan;
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{
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#ifdef DIAGNOSTIC
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if (chan & ~VALID_DMA_MASK)
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panic("isa_dma_acquire: channel out of range");
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#endif
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if (dma_inuse & (1 << chan)) {
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printf("isa_dma_acquire: channel %d already in use\n", chan);
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return (EBUSY);
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}
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dma_inuse |= (1 << chan);
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dma_auto_mode &= ~(1 << chan);
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return (0);
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}
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/*
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* Unregister a DMA channel's usage. Usually called from a device driver
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* during close() or during its shutdown.
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*/
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void
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isa_dma_release(chan)
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int chan;
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{
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#ifdef DIAGNOSTIC
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if (chan & ~VALID_DMA_MASK)
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panic("isa_dma_release: channel out of range");
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if ((dma_inuse & (1 << chan)) == 0)
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printf("isa_dma_release: channel %d not in use\n", chan);
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#endif
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if (dma_busy & (1 << chan)) {
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dma_busy &= ~(1 << chan);
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/*
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* XXX We should also do "dma_bounced &= (1 << chan);"
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* because we are acting on behalf of isa_dmadone() which
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* was not called to end the last DMA operation. This does
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* not matter now, but it may in the future.
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*/
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}
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dma_inuse &= ~(1 << chan);
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dma_auto_mode &= ~(1 << chan);
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}
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/*
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* isa_dmacascade(): program 8237 DMA controller channel to accept
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* external dma control by a board.
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*/
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void
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isa_dmacascade(chan)
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int chan;
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{
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#ifdef DIAGNOSTIC
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if (chan & ~VALID_DMA_MASK)
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panic("isa_dmacascade: channel out of range");
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#endif
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/* set dma channel mode, and set dma channel mode */
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if ((chan & 4) == 0) {
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outb(DMA1_MODE, DMA37MD_CASCADE | chan);
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outb(DMA1_SMSK, chan);
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} else {
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outb(DMA2_MODE, DMA37MD_CASCADE | (chan & 3));
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outb(DMA2_SMSK, chan & 3);
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}
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}
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/*
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* isa_dmastart(): program 8237 DMA controller channel, avoid page alignment
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* problems by using a bounce buffer.
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*/
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void
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isa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan)
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{
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vm_paddr_t phys;
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int waport;
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caddr_t newaddr;
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GIANT_REQUIRED;
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#ifdef DIAGNOSTIC
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if (chan & ~VALID_DMA_MASK)
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panic("isa_dmastart: channel out of range");
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if ((chan < 4 && nbytes > (1<<16))
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|| (chan >= 4 && (nbytes > (1<<17) || (uintptr_t)addr & 1)))
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panic("isa_dmastart: impossible request");
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if ((dma_inuse & (1 << chan)) == 0)
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printf("isa_dmastart: channel %d not acquired\n", chan);
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#endif
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#if 0
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/*
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* XXX This should be checked, but drivers like ad1848 only call
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* isa_dmastart() once because they use Auto DMA mode. If we
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* leave this in, drivers that do this will print this continuously.
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*/
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if (dma_busy & (1 << chan))
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printf("isa_dmastart: channel %d busy\n", chan);
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#endif
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dma_busy |= (1 << chan);
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if (isa_dmarangecheck(addr, nbytes, chan)) {
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if (dma_bouncebuf[chan] == NULL
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|| dma_bouncebufsize[chan] < nbytes)
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panic("isa_dmastart: bad bounce buffer");
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dma_bounced |= (1 << chan);
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newaddr = dma_bouncebuf[chan];
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/* copy bounce buffer on write */
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if (!(flags & ISADMA_READ))
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bcopy(addr, newaddr, nbytes);
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addr = newaddr;
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}
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/* translate to physical */
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phys = pmap_extract(kernel_pmap, (vm_offset_t)addr);
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if (flags & ISADMA_RAW) {
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dma_auto_mode |= (1 << chan);
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} else {
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dma_auto_mode &= ~(1 << chan);
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}
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if ((chan & 4) == 0) {
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/*
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* Program one of DMA channels 0..3. These are
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* byte mode channels.
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*/
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/* set dma channel mode, and reset address ff */
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/* If ISADMA_RAW flag is set, then use autoinitialise mode */
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if (flags & ISADMA_RAW) {
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if (flags & ISADMA_READ)
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outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_WRITE|chan);
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else
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outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_READ|chan);
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}
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else
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if (flags & ISADMA_READ)
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outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan);
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else
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outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan);
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outb(DMA1_FFC, 0);
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/* send start address */
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waport = DMA1_CHN(chan);
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outb(waport, phys);
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outb(waport, phys>>8);
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outb(dmapageport[chan], phys>>16);
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/* send count */
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outb(waport + 1, --nbytes);
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outb(waport + 1, nbytes>>8);
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/* unmask channel */
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outb(DMA1_SMSK, chan);
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} else {
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/*
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* Program one of DMA channels 4..7. These are
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* word mode channels.
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*/
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/* set dma channel mode, and reset address ff */
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/* If ISADMA_RAW flag is set, then use autoinitialise mode */
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if (flags & ISADMA_RAW) {
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if (flags & ISADMA_READ)
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outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_WRITE|(chan&3));
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else
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outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_READ|(chan&3));
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}
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else
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if (flags & ISADMA_READ)
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outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|(chan&3));
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else
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outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_READ|(chan&3));
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outb(DMA2_FFC, 0);
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/* send start address */
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waport = DMA2_CHN(chan - 4);
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outb(waport, phys>>1);
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outb(waport, phys>>9);
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outb(dmapageport[chan], phys>>16);
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/* send count */
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nbytes >>= 1;
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outb(waport + 2, --nbytes);
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outb(waport + 2, nbytes>>8);
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/* unmask channel */
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outb(DMA2_SMSK, chan & 3);
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}
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}
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void
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isa_dmadone(int flags, caddr_t addr, int nbytes, int chan)
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{
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#ifdef DIAGNOSTIC
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if (chan & ~VALID_DMA_MASK)
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panic("isa_dmadone: channel out of range");
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if ((dma_inuse & (1 << chan)) == 0)
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printf("isa_dmadone: channel %d not acquired\n", chan);
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#endif
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if (((dma_busy & (1 << chan)) == 0) &&
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(dma_auto_mode & (1 << chan)) == 0 )
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printf("isa_dmadone: channel %d not busy\n", chan);
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if ((dma_auto_mode & (1 << chan)) == 0)
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outb(chan & 4 ? DMA2_SMSK : DMA1_SMSK, (chan & 3) | 4);
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if (dma_bounced & (1 << chan)) {
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/* copy bounce buffer on read */
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if (flags & ISADMA_READ)
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bcopy(dma_bouncebuf[chan], addr, nbytes);
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dma_bounced &= ~(1 << chan);
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}
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dma_busy &= ~(1 << chan);
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}
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/*
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* Check for problems with the address range of a DMA transfer
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* (non-contiguous physical pages, outside of bus address space,
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* crossing DMA page boundaries).
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* Return true if special handling needed.
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*/
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static int
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isa_dmarangecheck(caddr_t va, u_int length, int chan)
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{
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vm_paddr_t phys, priorpage = 0;
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vm_offset_t endva;
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u_int dma_pgmsk = (chan & 4) ? ~(128*1024-1) : ~(64*1024-1);
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GIANT_REQUIRED;
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endva = (vm_offset_t)round_page((vm_offset_t)va + length);
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for (; va < (caddr_t) endva ; va += PAGE_SIZE) {
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phys = trunc_page(pmap_extract(kernel_pmap, (vm_offset_t)va));
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if (phys == 0)
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panic("isa_dmacheck: no physical page present");
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if (phys >= ISARAM_END)
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return (1);
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if (priorpage) {
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if (priorpage + PAGE_SIZE != phys)
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return (1);
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/* check if crossing a DMA page boundary */
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if (((u_int)priorpage ^ (u_int)phys) & dma_pgmsk)
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return (1);
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}
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priorpage = phys;
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}
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return (0);
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}
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/*
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* Query the progress of a transfer on a DMA channel.
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*
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* To avoid having to interrupt a transfer in progress, we sample
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* each of the high and low databytes twice, and apply the following
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* logic to determine the correct count.
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*
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* Reads are performed with interrupts disabled, thus it is to be
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* expected that the time between reads is very small. At most
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* one rollover in the low count byte can be expected within the
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* four reads that are performed.
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*
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* There are three gaps in which a rollover can occur :
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*
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* - read low1
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* gap1
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* - read high1
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* gap2
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* - read low2
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* gap3
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* - read high2
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*
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* If a rollover occurs in gap1 or gap2, the low2 value will be
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* greater than the low1 value. In this case, low2 and high2 are a
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* corresponding pair.
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*
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* In any other case, low1 and high1 can be considered to be correct.
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*
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* The function returns the number of bytes remaining in the transfer,
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* or -1 if the channel requested is not active.
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*
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*/
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int
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isa_dmastatus(int chan)
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{
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u_long cnt = 0;
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int ffport, waport;
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u_long low1, high1, low2, high2;
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/* channel active? */
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if ((dma_inuse & (1 << chan)) == 0) {
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printf("isa_dmastatus: channel %d not active\n", chan);
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return(-1);
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}
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/* channel busy? */
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if (((dma_busy & (1 << chan)) == 0) &&
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(dma_auto_mode & (1 << chan)) == 0 ) {
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printf("chan %d not busy\n", chan);
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return -2 ;
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}
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if (chan < 4) { /* low DMA controller */
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ffport = DMA1_FFC;
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waport = DMA1_CHN(chan) + 1;
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} else { /* high DMA controller */
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ffport = DMA2_FFC;
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waport = DMA2_CHN(chan - 4) + 2;
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}
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disable_intr(); /* no interrupts Mr Jones! */
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outb(ffport, 0); /* clear register LSB flipflop */
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low1 = inb(waport);
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high1 = inb(waport);
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outb(ffport, 0); /* clear again */
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low2 = inb(waport);
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high2 = inb(waport);
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enable_intr(); /* enable interrupts again */
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/*
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* Now decide if a wrap has tried to skew our results.
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* Note that after TC, the count will read 0xffff, while we want
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* to return zero, so we add and then mask to compensate.
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*/
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if (low1 >= low2) {
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cnt = (low1 + (high1 << 8) + 1) & 0xffff;
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} else {
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cnt = (low2 + (high2 << 8) + 1) & 0xffff;
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}
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if (chan >= 4) /* high channels move words */
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cnt *= 2;
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return(cnt);
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}
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/*
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* Stop a DMA transfer currently in progress.
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*/
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int
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isa_dmastop(int chan)
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{
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if ((dma_inuse & (1 << chan)) == 0)
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printf("isa_dmastop: channel %d not acquired\n", chan);
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if (((dma_busy & (1 << chan)) == 0) &&
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((dma_auto_mode & (1 << chan)) == 0)) {
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printf("chan %d not busy\n", chan);
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return -2 ;
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}
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if ((chan & 4) == 0) {
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outb(DMA1_SMSK, (chan & 3) | 4 /* disable mask */);
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} else {
|
|
outb(DMA2_SMSK, (chan & 3) | 4 /* disable mask */);
|
|
}
|
|
return(isa_dmastatus(chan));
|
|
}
|
|
|
|
/*
|
|
* Attach to the ISA PnP descriptor for the AT DMA controller
|
|
*/
|
|
static struct isa_pnp_id atdma_ids[] = {
|
|
{ 0x0002d041 /* PNP0200 */, "AT DMA controller" },
|
|
{ 0 }
|
|
};
|
|
|
|
static int
|
|
atdma_probe(device_t dev)
|
|
{
|
|
int result;
|
|
|
|
if ((result = ISA_PNP_PROBE(device_get_parent(dev), dev, atdma_ids)) <= 0)
|
|
device_quiet(dev);
|
|
return(result);
|
|
}
|
|
|
|
static int
|
|
atdma_attach(device_t dev)
|
|
{
|
|
return(0);
|
|
}
|
|
|
|
static device_method_t atdma_methods[] = {
|
|
/* Device interface */
|
|
DEVMETHOD(device_probe, atdma_probe),
|
|
DEVMETHOD(device_attach, atdma_attach),
|
|
DEVMETHOD(device_detach, bus_generic_detach),
|
|
DEVMETHOD(device_shutdown, bus_generic_shutdown),
|
|
DEVMETHOD(device_suspend, bus_generic_suspend),
|
|
DEVMETHOD(device_resume, bus_generic_resume),
|
|
{ 0, 0 }
|
|
};
|
|
|
|
static driver_t atdma_driver = {
|
|
"atdma",
|
|
atdma_methods,
|
|
1, /* no softc */
|
|
};
|
|
|
|
static devclass_t atdma_devclass;
|
|
|
|
DRIVER_MODULE(atdma, isa, atdma_driver, atdma_devclass, 0, 0);
|
|
DRIVER_MODULE(atdma, acpi, atdma_driver, atdma_devclass, 0, 0);
|