04b6fa8330
facilities as well as support for the Octeon 2 family of SoCs.
XXX Note that with our antediluvian assembler, we can't support some Octeon 2
instructions and fall back to using the old ones instead.
337 lines
12 KiB
C
337 lines
12 KiB
C
/***********************license start***************
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* Copyright (c) 2003-2010 Cavium Networks (support@cavium.com). All rights
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* reserved.
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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* * Neither the name of Cavium Networks nor the names of
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* its contributors may be used to endorse or promote products
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* derived from this software without specific prior written
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* permission.
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* This Software, including technical data, may be subject to U.S. export control
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* laws, including the U.S. Export Administration Act and its associated
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* regulations, and may be subject to export or import regulations in other
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* countries.
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* TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
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* AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR
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* WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
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* THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
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* DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
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* SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
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* MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
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* VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
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* CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR
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* PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
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***********************license end**************************************/
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/**
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* @file
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*
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* Support functions for managing command queues used for
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* various hardware blocks.
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*
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* <hr>$Revision: 49448 $<hr>
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*/
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#ifdef CVMX_BUILD_FOR_LINUX_KERNEL
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#include <linux/module.h>
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#include <asm/octeon/cvmx.h>
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#include <asm/octeon/cvmx-bootmem.h>
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#include <asm/octeon/cvmx-npei-defs.h>
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#include <asm/octeon/cvmx-pexp-defs.h>
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#include <asm/octeon/cvmx-dpi-defs.h>
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#include <asm/octeon/cvmx-pko-defs.h>
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#include <asm/octeon/cvmx-config.h>
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#include <asm/octeon/cvmx-fpa.h>
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#include <asm/octeon/cvmx-cmd-queue.h>
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#else
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#include "cvmx.h"
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#include "cvmx-bootmem.h"
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#if !defined(__FreeBSD__) || !defined(_KERNEL)
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#include "cvmx-config.h"
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#endif
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#include "cvmx-fpa.h"
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#include "cvmx-cmd-queue.h"
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#endif
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/**
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* This application uses this pointer to access the global queue
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* state. It points to a bootmem named block.
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*/
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CVMX_SHARED __cvmx_cmd_queue_all_state_t *__cvmx_cmd_queue_state_ptr;
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#ifdef CVMX_BUILD_FOR_LINUX_KERNEL
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EXPORT_SYMBOL(__cvmx_cmd_queue_state_ptr);
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#endif
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/**
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* @INTERNAL
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* Initialize the Global queue state pointer.
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*
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* @return CVMX_CMD_QUEUE_SUCCESS or a failure code
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*/
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static cvmx_cmd_queue_result_t __cvmx_cmd_queue_init_state_ptr(void)
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{
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char *alloc_name = "cvmx_cmd_queues";
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#if defined(CONFIG_CAVIUM_RESERVE32) && CONFIG_CAVIUM_RESERVE32
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extern uint64_t octeon_reserve32_memory;
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#endif
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if (cvmx_likely(__cvmx_cmd_queue_state_ptr))
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return CVMX_CMD_QUEUE_SUCCESS;
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#ifdef CVMX_BUILD_FOR_LINUX_KERNEL
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#if defined(CONFIG_CAVIUM_RESERVE32) && CONFIG_CAVIUM_RESERVE32
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if (octeon_reserve32_memory)
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__cvmx_cmd_queue_state_ptr = cvmx_bootmem_alloc_named_range(sizeof(*__cvmx_cmd_queue_state_ptr),
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octeon_reserve32_memory,
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octeon_reserve32_memory + (CONFIG_CAVIUM_RESERVE32<<20) - 1,
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128, alloc_name);
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else
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#endif
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__cvmx_cmd_queue_state_ptr = cvmx_bootmem_alloc_named(sizeof(*__cvmx_cmd_queue_state_ptr), 128, alloc_name);
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#else
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__cvmx_cmd_queue_state_ptr = cvmx_bootmem_alloc_named(sizeof(*__cvmx_cmd_queue_state_ptr), 128, alloc_name);
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#endif
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if (__cvmx_cmd_queue_state_ptr)
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memset(__cvmx_cmd_queue_state_ptr, 0, sizeof(*__cvmx_cmd_queue_state_ptr));
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else
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{
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const cvmx_bootmem_named_block_desc_t *block_desc = cvmx_bootmem_find_named_block(alloc_name);
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if (block_desc)
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__cvmx_cmd_queue_state_ptr = cvmx_phys_to_ptr(block_desc->base_addr);
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else
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{
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cvmx_dprintf("ERROR: cvmx_cmd_queue_initialize: Unable to get named block %s.\n", alloc_name);
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return CVMX_CMD_QUEUE_NO_MEMORY;
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}
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}
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return CVMX_CMD_QUEUE_SUCCESS;
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}
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/**
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* Initialize a command queue for use. The initial FPA buffer is
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* allocated and the hardware unit is configured to point to the
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* new command queue.
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*
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* @param queue_id Hardware command queue to initialize.
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* @param max_depth Maximum outstanding commands that can be queued.
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* @param fpa_pool FPA pool the command queues should come from.
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* @param pool_size Size of each buffer in the FPA pool (bytes)
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*
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* @return CVMX_CMD_QUEUE_SUCCESS or a failure code
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*/
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cvmx_cmd_queue_result_t cvmx_cmd_queue_initialize(cvmx_cmd_queue_id_t queue_id, int max_depth, int fpa_pool, int pool_size)
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{
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__cvmx_cmd_queue_state_t *qstate;
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cvmx_cmd_queue_result_t result = __cvmx_cmd_queue_init_state_ptr();
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if (result != CVMX_CMD_QUEUE_SUCCESS)
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return result;
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qstate = __cvmx_cmd_queue_get_state(queue_id);
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if (qstate == NULL)
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return CVMX_CMD_QUEUE_INVALID_PARAM;
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/* We artificially limit max_depth to 1<<20 words. It is an arbitrary limit */
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if (CVMX_CMD_QUEUE_ENABLE_MAX_DEPTH)
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{
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if ((max_depth < 0) || (max_depth > 1<<20))
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return CVMX_CMD_QUEUE_INVALID_PARAM;
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}
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else if (max_depth != 0)
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return CVMX_CMD_QUEUE_INVALID_PARAM;
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if ((fpa_pool < 0) || (fpa_pool > 7))
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return CVMX_CMD_QUEUE_INVALID_PARAM;
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if ((pool_size < 128) || (pool_size > 65536))
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return CVMX_CMD_QUEUE_INVALID_PARAM;
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/* See if someone else has already initialized the queue */
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if (qstate->base_ptr_div128)
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{
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if (max_depth != (int)qstate->max_depth)
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{
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cvmx_dprintf("ERROR: cvmx_cmd_queue_initialize: Queue already initialized with different max_depth (%d).\n", (int)qstate->max_depth);
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return CVMX_CMD_QUEUE_INVALID_PARAM;
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}
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if (fpa_pool != qstate->fpa_pool)
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{
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cvmx_dprintf("ERROR: cvmx_cmd_queue_initialize: Queue already initialized with different FPA pool (%u).\n", qstate->fpa_pool);
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return CVMX_CMD_QUEUE_INVALID_PARAM;
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}
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if ((pool_size>>3)-1 != qstate->pool_size_m1)
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{
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cvmx_dprintf("ERROR: cvmx_cmd_queue_initialize: Queue already initialized with different FPA pool size (%u).\n", (qstate->pool_size_m1+1)<<3);
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return CVMX_CMD_QUEUE_INVALID_PARAM;
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}
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CVMX_SYNCWS;
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return CVMX_CMD_QUEUE_ALREADY_SETUP;
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}
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else
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{
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cvmx_fpa_ctl_status_t status;
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void *buffer;
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status.u64 = cvmx_read_csr(CVMX_FPA_CTL_STATUS);
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if (!status.s.enb)
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{
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cvmx_dprintf("ERROR: cvmx_cmd_queue_initialize: FPA is not enabled.\n");
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return CVMX_CMD_QUEUE_NO_MEMORY;
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}
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buffer = cvmx_fpa_alloc(fpa_pool);
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if (buffer == NULL)
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{
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cvmx_dprintf("ERROR: cvmx_cmd_queue_initialize: Unable to allocate initial buffer.\n");
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return CVMX_CMD_QUEUE_NO_MEMORY;
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}
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memset(qstate, 0, sizeof(*qstate));
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qstate->max_depth = max_depth;
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qstate->fpa_pool = fpa_pool;
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qstate->pool_size_m1 = (pool_size>>3)-1;
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qstate->base_ptr_div128 = cvmx_ptr_to_phys(buffer) / 128;
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/* We zeroed the now serving field so we need to also zero the ticket */
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__cvmx_cmd_queue_state_ptr->ticket[__cvmx_cmd_queue_get_index(queue_id)] = 0;
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CVMX_SYNCWS;
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return CVMX_CMD_QUEUE_SUCCESS;
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}
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}
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/**
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* Shutdown a queue a free it's command buffers to the FPA. The
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* hardware connected to the queue must be stopped before this
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* function is called.
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*
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* @param queue_id Queue to shutdown
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*
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* @return CVMX_CMD_QUEUE_SUCCESS or a failure code
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*/
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cvmx_cmd_queue_result_t cvmx_cmd_queue_shutdown(cvmx_cmd_queue_id_t queue_id)
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{
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__cvmx_cmd_queue_state_t *qptr = __cvmx_cmd_queue_get_state(queue_id);
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if (qptr == NULL)
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{
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cvmx_dprintf("ERROR: cvmx_cmd_queue_shutdown: Unable to get queue information.\n");
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return CVMX_CMD_QUEUE_INVALID_PARAM;
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}
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if (cvmx_cmd_queue_length(queue_id) > 0)
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{
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cvmx_dprintf("ERROR: cvmx_cmd_queue_shutdown: Queue still has data in it.\n");
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return CVMX_CMD_QUEUE_FULL;
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}
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__cvmx_cmd_queue_lock(queue_id, qptr);
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if (qptr->base_ptr_div128)
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{
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cvmx_fpa_free(cvmx_phys_to_ptr((uint64_t)qptr->base_ptr_div128<<7), qptr->fpa_pool, 0);
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qptr->base_ptr_div128 = 0;
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}
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__cvmx_cmd_queue_unlock(qptr);
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return CVMX_CMD_QUEUE_SUCCESS;
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}
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/**
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* Return the number of command words pending in the queue. This
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* function may be relatively slow for some hardware units.
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*
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* @param queue_id Hardware command queue to query
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*
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* @return Number of outstanding commands
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*/
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int cvmx_cmd_queue_length(cvmx_cmd_queue_id_t queue_id)
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{
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if (CVMX_ENABLE_PARAMETER_CHECKING)
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{
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if (__cvmx_cmd_queue_get_state(queue_id) == NULL)
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return CVMX_CMD_QUEUE_INVALID_PARAM;
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}
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/* The cast is here so gcc with check that all values in the
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cvmx_cmd_queue_id_t enumeration are here */
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switch ((cvmx_cmd_queue_id_t)(queue_id & 0xff0000))
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{
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case CVMX_CMD_QUEUE_PKO_BASE:
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/* FIXME: Need atomic lock on CVMX_PKO_REG_READ_IDX. Right now we
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are normally called with the queue lock, so that is a SLIGHT
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amount of protection */
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cvmx_write_csr(CVMX_PKO_REG_READ_IDX, queue_id & 0xffff);
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if (OCTEON_IS_MODEL(OCTEON_CN3XXX))
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{
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cvmx_pko_mem_debug9_t debug9;
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debug9.u64 = cvmx_read_csr(CVMX_PKO_MEM_DEBUG9);
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return debug9.cn38xx.doorbell;
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}
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else
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{
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cvmx_pko_mem_debug8_t debug8;
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debug8.u64 = cvmx_read_csr(CVMX_PKO_MEM_DEBUG8);
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return debug8.cn58xx.doorbell;
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}
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case CVMX_CMD_QUEUE_ZIP:
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case CVMX_CMD_QUEUE_DFA:
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case CVMX_CMD_QUEUE_RAID:
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// FIXME: Implement other lengths
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return 0;
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case CVMX_CMD_QUEUE_DMA_BASE:
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if (octeon_has_feature(OCTEON_FEATURE_NPEI))
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{
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cvmx_npei_dmax_counts_t dmax_counts;
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dmax_counts.u64 = cvmx_read_csr(CVMX_PEXP_NPEI_DMAX_COUNTS(queue_id & 0x7));
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return dmax_counts.s.dbell;
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}
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else
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{
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cvmx_dpi_dmax_counts_t dmax_counts;
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dmax_counts.u64 = cvmx_read_csr(CVMX_DPI_DMAX_COUNTS(queue_id & 0x7));
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return dmax_counts.s.dbell;
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}
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case CVMX_CMD_QUEUE_END:
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return CVMX_CMD_QUEUE_INVALID_PARAM;
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}
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return CVMX_CMD_QUEUE_INVALID_PARAM;
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}
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/**
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* Return the command buffer to be written to. The purpose of this
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* function is to allow CVMX routine access to the low level buffer
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* for initial hardware setup. User applications should not call this
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* function directly.
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*
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* @param queue_id Command queue to query
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*
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* @return Command buffer or NULL on failure
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*/
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void *cvmx_cmd_queue_buffer(cvmx_cmd_queue_id_t queue_id)
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{
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__cvmx_cmd_queue_state_t *qptr = __cvmx_cmd_queue_get_state(queue_id);
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if (qptr && qptr->base_ptr_div128)
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return cvmx_phys_to_ptr((uint64_t)qptr->base_ptr_div128<<7);
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else
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return NULL;
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}
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