b8ad00b0ed
(disabled by default). To enable it, dev.rtwn.%d.radar_detection tunable need to be set to a nonzero value. Tested with RTL8821AU, AP mode (no radar events were seen - so, I have no idea if it is really correct / working) Reviewed by: adrian Differential Revision: https://reviews.freebsd.org/D8903
127 lines
4.4 KiB
C
127 lines
4.4 KiB
C
/*-
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* Copyright (c) 2016 Andriy Voskoboinyk <avos@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef R12A_VAR_H
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#define R12A_VAR_H
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#include <dev/rtwn/rtl8812a/r12a_rom_defs.h>
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struct r12a_softc {
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uint8_t chip;
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#define R12A_CHIP_C_CUT 0x01
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uint8_t rs_flags;
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#define R12A_RXCKSUM_EN 0x01
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#define R12A_RXCKSUM6_EN 0x02
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#define R12A_IQK_RUNNING 0x04
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#define R12A_RADAR_ENABLED 0x08
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int rs_radar;
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struct timeout_task rs_chan_check;
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/* ROM variables */
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int ext_pa_2g:1,
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ext_pa_5g:1,
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ext_lna_2g:1,
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ext_lna_5g:1,
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type_pa_2g:4,
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type_pa_5g:4,
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type_lna_2g:4,
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type_lna_5g:4,
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bt_coex:1,
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bt_ant_num:1;
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uint8_t board_type;
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uint8_t regulatory;
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uint8_t crystalcap;
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uint8_t rfe_type;
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uint8_t tx_bbswing_2g;
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uint8_t tx_bbswing_5g;
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uint8_t cck_tx_pwr[R12A_MAX_RF_PATH][R12A_GROUP_2G];
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uint8_t ht40_tx_pwr_2g[R12A_MAX_RF_PATH][R12A_GROUP_2G];
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uint8_t ht40_tx_pwr_5g[R12A_MAX_RF_PATH][R12A_GROUP_5G];
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int8_t cck_tx_pwr_diff_2g[R12A_MAX_RF_PATH][R12A_MAX_TX_COUNT];
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int8_t ofdm_tx_pwr_diff_2g[R12A_MAX_RF_PATH][R12A_MAX_TX_COUNT];
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int8_t bw20_tx_pwr_diff_2g[R12A_MAX_RF_PATH][R12A_MAX_TX_COUNT];
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int8_t bw40_tx_pwr_diff_2g[R12A_MAX_RF_PATH][R12A_MAX_TX_COUNT];
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int8_t ofdm_tx_pwr_diff_5g[R12A_MAX_RF_PATH][R12A_MAX_TX_COUNT];
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int8_t bw20_tx_pwr_diff_5g[R12A_MAX_RF_PATH][R12A_MAX_TX_COUNT];
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int8_t bw40_tx_pwr_diff_5g[R12A_MAX_RF_PATH][R12A_MAX_TX_COUNT];
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int8_t bw80_tx_pwr_diff_5g[R12A_MAX_RF_PATH][R12A_MAX_TX_COUNT];
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int8_t bw160_tx_pwr_diff_5g[R12A_MAX_RF_PATH][R12A_MAX_TX_COUNT];
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int sc_ant;
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int (*rs_newstate[RTWN_PORT_COUNT])(struct ieee80211vap *,
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enum ieee80211_state, int);
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void (*rs_scan_start)(struct ieee80211com *);
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void (*rs_scan_end)(struct ieee80211com *);
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void (*rs_crystalcap_write)(struct rtwn_softc *);
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void (*rs_fix_spur)(struct rtwn_softc *,
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struct ieee80211_channel *);
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void (*rs_set_band_2ghz)(struct rtwn_softc *, uint32_t);
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void (*rs_set_band_5ghz)(struct rtwn_softc *, uint32_t);
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void (*rs_init_burstlen)(struct rtwn_softc *);
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void (*rs_init_ampdu_fwhw)(struct rtwn_softc *);
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#ifndef RTWN_WITHOUT_UCODE
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int (*rs_iq_calib_fw_supported)(struct rtwn_softc *);
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#endif
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void (*rs_iq_calib_sw)(struct rtwn_softc *);
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int ac_usb_dma_size;
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int ac_usb_dma_time;
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int ampdu_max_time;
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};
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#define R12A_SOFTC(_sc) ((struct r12a_softc *)((_sc)->sc_priv))
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#define rtwn_r12a_fix_spur(_sc, _c) \
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((R12A_SOFTC(_sc)->rs_fix_spur)((_sc), (_c)))
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#define rtwn_r12a_set_band_2ghz(_sc, _rates) \
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((R12A_SOFTC(_sc)->rs_set_band_2ghz)((_sc), (_rates)))
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#define rtwn_r12a_set_band_5ghz(_sc, _rates) \
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((R12A_SOFTC(_sc)->rs_set_band_5ghz)((_sc), (_rates)))
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#define rtwn_r12a_init_burstlen(_sc) \
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((R12A_SOFTC(_sc)->rs_init_burstlen)((_sc)))
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#define rtwn_r12a_init_ampdu_fwhw(_sc) \
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((R12A_SOFTC(_sc)->rs_init_ampdu_fwhw)((_sc)))
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#define rtwn_r12a_crystalcap_write(_sc) \
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((R12A_SOFTC(_sc)->rs_crystalcap_write)((_sc)))
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#ifndef RTWN_WITHOUT_UCODE
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#define rtwn_r12a_iq_calib_fw_supported(_sc) \
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((R12A_SOFTC(_sc)->rs_iq_calib_fw_supported)((_sc)))
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#endif
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#define rtwn_r12a_iq_calib_sw(_sc) \
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((R12A_SOFTC(_sc)->rs_iq_calib_sw)((_sc)))
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#endif /* R12A_VAR_H */
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