9624d94701
using the o32 ABI. This mostly follows nwhitehorn's lead in implementing
COMPAT_FREEBSD32 on powerpc64.
o) Add a new type to the freebsd32 compat layer, time32_t, which is time_t in the
32-bit ABI being used. Since the MIPS port is relatively-new, even the 32-bit
ABIs use a 64-bit time_t.
o) Because time{spec,val}32 has the same size and layout as time{spec,val} on MIPS
with 32-bit compatibility, then, disable some code which assumes otherwise
wrongly when built for MIPS. A more general macro to check in this case would
seem like a good idea eventually. If someone adds support for using n32
userland with n64 kernels on MIPS, then they will have to add a variety of
flags related to each piece of the ABI that can vary. That's probably the
right time to generalize further.
o) Add MIPS to the list of architectures which use PAD64_REQUIRED in the
freebsd32 compat code. Probably this should be generalized at some point.
Reviewed by: gonzo
139 lines
4.4 KiB
C
139 lines
4.4 KiB
C
/*
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* Copyright (c) 1992, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* Ralph Campbell.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)ucontext.h 8.1 (Berkeley) 6/10/93
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* JNPR: ucontext.h,v 1.2 2007/08/09 11:23:32 katta
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* $FreeBSD$
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*/
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#ifndef _MACHINE_UCONTEXT_H_
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#define _MACHINE_UCONTEXT_H_
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#ifndef _LOCORE
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#if defined(_KERNEL) && !defined(KLD_MODULE) && !defined(_STANDALONE)
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#include "opt_compat.h"
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#endif
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typedef struct __mcontext {
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/*
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* These fields must match the corresponding fields in struct
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* sigcontext which follow 'sc_mask'. That way we can support
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* struct sigcontext and ucontext_t at the same time.
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*/
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int mc_onstack; /* sigstack state to restore */
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register_t mc_pc; /* pc at time of signal */
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register_t mc_regs[32]; /* processor regs 0 to 31 */
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register_t sr; /* status register */
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register_t mullo, mulhi; /* mullo and mulhi registers... */
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int mc_fpused; /* fp has been used */
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f_register_t mc_fpregs[33]; /* fp regs 0 to 31 and csr */
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register_t mc_fpc_eir; /* fp exception instruction reg */
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void *mc_tls; /* pointer to TLS area */
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int __spare__[8]; /* XXX reserved */
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} mcontext_t;
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#if (defined(__mips_n32) || defined(__mips_n64)) && defined(COMPAT_FREEBSD32)
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#include <compat/freebsd32/freebsd32_signal.h>
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typedef struct __mcontext32 {
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int mc_onstack;
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int32_t mc_pc;
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int32_t mc_regs[32];
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int32_t sr;
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int32_t mullo, mulhi;
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int mc_fpused;
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int32_t mc_fpregs[33];
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int32_t mc_fpc_eir;
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void *mc_tls;
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int __spare__[8];
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} mcontext32_t;
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typedef struct __ucontext32 {
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sigset_t uc_sigmask;
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mcontext32_t uc_mcontext;
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uint32_t uc_link;
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struct sigaltstack32 uc_stack;
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uint32_t uc_flags;
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uint32_t __spare__[4];
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} ucontext32_t;
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#endif
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#endif
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#ifndef SZREG
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#if defined(__mips_o32)
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#define SZREG 4
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#else
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#define SZREG 8
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#endif
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#endif
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/* offsets into mcontext_t */
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#define UCTX_REG(x) (4 + SZREG + (x)*SZREG)
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#define UCR_ZERO UCTX_REG(0)
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#define UCR_AT UCTX_REG(1)
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#define UCR_V0 UCTX_REG(2)
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#define UCR_V1 UCTX_REG(3)
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#define UCR_A0 UCTX_REG(4)
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#define UCR_A1 UCTX_REG(5)
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#define UCR_A2 UCTX_REG(6)
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#define UCR_A3 UCTX_REG(7)
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#define UCR_T0 UCTX_REG(8)
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#define UCR_T1 UCTX_REG(9)
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#define UCR_T2 UCTX_REG(10)
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#define UCR_T3 UCTX_REG(11)
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#define UCR_T4 UCTX_REG(12)
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#define UCR_T5 UCTX_REG(13)
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#define UCR_T6 UCTX_REG(14)
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#define UCR_T7 UCTX_REG(15)
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#define UCR_S0 UCTX_REG(16)
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#define UCR_S1 UCTX_REG(17)
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#define UCR_S2 UCTX_REG(18)
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#define UCR_S3 UCTX_REG(19)
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#define UCR_S4 UCTX_REG(20)
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#define UCR_S5 UCTX_REG(21)
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#define UCR_S6 UCTX_REG(22)
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#define UCR_S7 UCTX_REG(23)
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#define UCR_T8 UCTX_REG(24)
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#define UCR_T9 UCTX_REG(25)
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#define UCR_K0 UCTX_REG(26)
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#define UCR_K1 UCTX_REG(27)
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#define UCR_GP UCTX_REG(28)
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#define UCR_SP UCTX_REG(29)
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#define UCR_S8 UCTX_REG(30)
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#define UCR_RA UCTX_REG(31)
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#define UCR_SR UCTX_REG(32)
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#define UCR_MDLO UCTX_REG(33)
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#define UCR_MDHI UCTX_REG(34)
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#endif /* !_MACHINE_UCONTEXT_H_ */
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