freebsd-nq/sys/mips
Warner Losh 96a25a70ad Move the hard-wiring of the dcache on octeon outside of the if
statement.  When no caches support was added, it looks like
TARGET_OCTEON was bogusly moved inside the if.  Also, include
opt_cputype.h to make TARGET_OCTEON actually active.

# now we die in pmap init somewhere...  Most likely because 32MB of RAM is
# too tight given the load address we're using.
2009-11-24 08:35:11 +00:00
..
adm5120 With this commit our friend RMI will now compile. I have 2009-10-30 08:53:11 +00:00
alchemy With this commit our friend RMI will now compile. I have 2009-10-30 08:53:11 +00:00
atheros - Add intr counters for APB interrupts 2009-11-18 22:53:05 +00:00
compile
conf Specify loader script and load address 2009-11-23 07:49:50 +00:00
idt With this commit our friend RMI will now compile. I have 2009-10-30 08:53:11 +00:00
include Another kludge for 64-bit bus_addr_t with 32-bit pointers... 2009-11-20 16:32:26 +00:00
malta With this commit our friend RMI will now compile. I have 2009-10-30 08:53:11 +00:00
mips Move the hard-wiring of the dcache on octeon outside of the if 2009-11-24 08:35:11 +00:00
octeon1 remove bogus panic. 2009-11-24 08:21:23 +00:00
rmi Ok set in the values in clock 7 as in the 2009-11-11 22:36:19 +00:00
sentry5 With this commit our friend RMI will now compile. I have 2009-10-30 08:53:11 +00:00
sibyte With this commit our friend RMI will now compile. I have 2009-10-30 08:53:11 +00:00