179f14534e
This is an import of the reworked LEDE dts files. Besides other things they make it easier for us to reuse. The only diffs left are for the following SoCs: MT7620A (fbsd-mt7620a.dtsi) MT7621 (fbsd-mt7621.dtsi) MT7628 (fbsd-mt7628an.dtsi) RT3883 (fbsd-rt3883.dtsi) So we include the fbsd-*.dtsi files at the end of the original LEDE dtsi files, using '#include "fbsd-xxxx.dtsi"'. For example, for MT7621, the LEDE dtsi file is mt7621.dtsi. At the end of it we add: #include "fbsd-mt7621.dtsi" Approved by: adrian (mentor) Obtained from: LEDE project Sponsored by: Smartcom - Bulgaria AD Differential Revision: https://reviews.freebsd.org/D6394
115 lines
1.6 KiB
Plaintext
115 lines
1.6 KiB
Plaintext
/dts-v1/;
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#include "mt7620a.dtsi"
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/ {
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compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc";
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model = "Ralink MT7620a V22SG High Power evaluation board";
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gpio-keys-polled {
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compatible = "gpio-keys-polled";
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#address-cells = <1>;
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#size-cells = <0>;
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poll-interval = <20>;
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reset {
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label = "reset";
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gpios = <&gpio0 1 1>;
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linux,code = <0x198>;
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};
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aoss {
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label = "aoss";
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gpios = <&gpio0 2 1>;
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linux,code = <0x211>;
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};
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};
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nand {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "mtk,mt7620-nand";
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x40000>;
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read-only;
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};
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partition@40000 {
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label = "u-boot-env";
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reg = <0x40000 0x20000>;
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read-only;
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};
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factory: partition@60000 {
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label = "factory";
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reg = <0x60000 0x20000>;
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read-only;
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};
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partition@80000 {
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label = "firmware";
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reg = <0x80000 0x7f80000>;
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};
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};
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};
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&pinctrl {
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state_default: pinctrl0 {
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gpio {
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ralink,group = "i2c", "uartf", "spi";
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ralink,function = "gpio";
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};
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};
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};
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ðernet {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
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mediatek,portmap = "llllw";
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port@4 {
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status = "okay";
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phy-handle = <&phy4>;
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phy-mode = "rgmii";
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};
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port@5 {
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status = "okay";
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phy-handle = <&phy5>;
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phy-mode = "rgmii";
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};
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mdio-bus {
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status = "okay";
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phy4: ethernet-phy@4 {
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reg = <4>;
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phy-mode = "rgmii";
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};
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phy5: ethernet-phy@5 {
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reg = <5>;
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phy-mode = "rgmii";
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};
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};
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};
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&gsw {
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mediatek,port4 = "gmac";
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};
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&pcie {
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status = "okay";
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};
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&ehci {
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status = "okay";
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};
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&ohci {
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status = "okay";
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};
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