f2d8ff04fe
Firmware upgraded to 7.1.0 (from 5.0.0). T3C EEPROM and SRAM added; Code to update eeprom/sram fixed. fl_empty and rx_fifo_ovfl counters can be observed via sysctl. Two new cxgbtool commands to get uP logic analyzer info and uP IOQs Synced up with Chelsio's "common code" (as of 03/03/09) Submitted by: Navdeep Parhar at Chelsio Reviewed by: gnn MFC after: 2 weeks
243 lines
6.1 KiB
C
243 lines
6.1 KiB
C
/**************************************************************************
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Copyright (c) 2007-2008, Chelsio Inc.
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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2. Neither the name of the Chelsio Corporation nor the names of its
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contributors may be used to endorse or promote products derived from
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this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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$FreeBSD$
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***************************************************************************/
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#ifndef __CHIOCTL_H__
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#define __CHIOCTL_H__
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/*
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* Ioctl commands specific to this driver.
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*/
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enum {
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CH_SETREG = 0x40,
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CH_GETREG,
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CH_GETMTUTAB,
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CH_SETMTUTAB,
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CH_SET_PM,
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CH_GET_PM,
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CH_READ_TCAM_WORD,
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CH_GET_MEM,
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CH_GET_SGE_CONTEXT,
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CH_GET_SGE_DESC,
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CH_LOAD_FW,
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CH_SET_TRACE_FILTER,
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CH_GET_QSET_PARAMS,
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CH_GET_QSET_NUM,
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CH_SET_PKTSCHED,
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CH_IFCONF_GETREGS,
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CH_GET_MIIREG,
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CH_SET_MIIREG,
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CH_GET_EEPROM,
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CH_SET_HW_SCHED,
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CH_LOAD_BOOT,
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CH_CLEAR_STATS,
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CH_GET_UP_LA,
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CH_GET_UP_IOQS,
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};
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/* statistics categories */
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enum {
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STATS_PORT = 1 << 1,
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STATS_QUEUE = 1 << 2,
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};
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struct ch_reg {
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uint32_t addr;
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uint32_t val;
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};
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struct ch_cntxt {
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uint32_t cntxt_type;
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uint32_t cntxt_id;
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uint32_t data[4];
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};
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/* context types */
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enum { CNTXT_TYPE_EGRESS, CNTXT_TYPE_FL, CNTXT_TYPE_RSP, CNTXT_TYPE_CQ };
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struct ch_desc {
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uint32_t queue_num;
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uint32_t idx;
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uint32_t size;
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uint8_t data[128];
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};
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struct ch_mem_range {
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uint32_t mem_id;
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uint32_t addr;
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uint32_t len;
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uint32_t version;
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uint8_t *buf;
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};
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enum { MEM_CM, MEM_PMRX, MEM_PMTX }; /* ch_mem_range.mem_id values */
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struct ch_qset_params {
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uint32_t qset_idx;
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int32_t txq_size[3];
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int32_t rspq_size;
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int32_t fl_size[2];
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int32_t intr_lat;
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int32_t polling;
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int32_t lro;
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int32_t cong_thres;
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int32_t vector;
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int32_t qnum;
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};
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struct ch_pktsched_params {
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uint8_t sched;
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uint8_t idx;
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uint8_t min;
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uint8_t max;
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uint8_t binding;
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};
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struct ch_hw_sched {
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uint8_t sched;
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int8_t mode;
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int8_t channel;
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int32_t kbps; /* rate in Kbps */
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int32_t class_ipg; /* tenths of nanoseconds */
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int32_t flow_ipg; /* usec */
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};
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struct ch_mtus {
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uint32_t nmtus;
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uint16_t mtus[NMTUS];
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};
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struct ch_pm {
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uint32_t tx_pg_sz;
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uint32_t tx_num_pg;
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uint32_t rx_pg_sz;
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uint32_t rx_num_pg;
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uint32_t pm_total;
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};
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struct ch_tcam_word {
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uint32_t addr;
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uint32_t buf[3];
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};
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struct ch_trace {
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uint32_t sip;
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uint32_t sip_mask;
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uint32_t dip;
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uint32_t dip_mask;
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uint16_t sport;
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uint16_t sport_mask;
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uint16_t dport;
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uint16_t dport_mask;
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uint32_t vlan:12;
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uint32_t vlan_mask:12;
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uint32_t intf:4;
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uint32_t intf_mask:4;
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uint8_t proto;
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uint8_t proto_mask;
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uint8_t invert_match:1;
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uint8_t config_tx:1;
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uint8_t config_rx:1;
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uint8_t trace_tx:1;
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uint8_t trace_rx:1;
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};
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#define REGDUMP_SIZE (4 * 1024)
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struct ch_ifconf_regs {
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uint32_t version;
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uint32_t len; /* bytes */
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uint8_t *data;
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};
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struct ch_mii_data {
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uint32_t phy_id;
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uint32_t reg_num;
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uint32_t val_in;
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uint32_t val_out;
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};
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struct ch_eeprom {
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uint32_t magic;
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uint32_t offset;
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uint32_t len;
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uint8_t *data;
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};
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#define LA_BUFSIZE (2 * 1024)
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struct ch_up_la {
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uint32_t stopped;
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uint32_t idx;
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uint32_t bufsize;
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uint32_t *data;
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};
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struct t3_ioq_entry {
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uint32_t ioq_cp;
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uint32_t ioq_pp;
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uint32_t ioq_alen;
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uint32_t ioq_stats;
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};
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#define IOQS_BUFSIZE (1024)
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struct ch_up_ioqs {
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uint32_t ioq_rx_enable;
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uint32_t ioq_tx_enable;
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uint32_t ioq_rx_status;
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uint32_t ioq_tx_status;
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uint32_t bufsize;
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struct t3_ioq_entry *data;
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};
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#define CHELSIO_SETREG _IOW('f', CH_SETREG, struct ch_reg)
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#define CHELSIO_GETREG _IOWR('f', CH_GETREG, struct ch_reg)
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#define CHELSIO_GETMTUTAB _IOR('f', CH_GETMTUTAB, struct ch_mtus)
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#define CHELSIO_SETMTUTAB _IOW('f', CH_SETMTUTAB, struct ch_mtus)
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#define CHELSIO_SET_PM _IOW('f', CH_SET_PM, struct ch_pm)
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#define CHELSIO_GET_PM _IOR('f', CH_GET_PM, struct ch_pm)
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#define CHELSIO_READ_TCAM_WORD _IOWR('f', CH_READ_TCAM_WORD, struct ch_tcam_word)
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#define CHELSIO_GET_MEM _IOWR('f', CH_GET_MEM, struct ch_mem_range)
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#define CHELSIO_GET_SGE_CONTEXT _IOWR('f', CH_GET_SGE_CONTEXT, struct ch_cntxt)
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#define CHELSIO_GET_SGE_DESC _IOWR('f', CH_GET_SGE_DESC, struct ch_desc)
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#define CHELSIO_LOAD_FW _IOWR('f', CH_LOAD_FW, struct ch_mem_range)
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#define CHELSIO_SET_TRACE_FILTER _IOW('f', CH_SET_TRACE_FILTER, struct ch_trace)
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#define CHELSIO_GET_QSET_PARAMS _IOWR('f', CH_GET_QSET_PARAMS, struct ch_qset_params)
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#define CHELSIO_GET_QSET_NUM _IOR('f', CH_GET_QSET_NUM, struct ch_reg)
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#define CHELSIO_SET_PKTSCHED _IOW('f', CH_SET_PKTSCHED, struct ch_pktsched_params)
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#define CHELSIO_SET_HW_SCHED _IOW('f', CH_SET_HW_SCHED, struct ch_hw_sched)
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#define CHELSIO_LOAD_BOOT _IOW('f', CH_LOAD_BOOT, struct ch_mem_range)
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#define CHELSIO_CLEAR_STATS _IO('f', CH_CLEAR_STATS)
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#define CHELSIO_IFCONF_GETREGS _IOWR('f', CH_IFCONF_GETREGS, struct ch_ifconf_regs)
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#define CHELSIO_GET_MIIREG _IOWR('f', CH_GET_MIIREG, struct ch_mii_data)
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#define CHELSIO_SET_MIIREG _IOW('f', CH_SET_MIIREG, struct ch_mii_data)
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#define CHELSIO_GET_EEPROM _IOWR('f', CH_GET_EEPROM, struct ch_eeprom)
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#define CHELSIO_GET_UP_LA _IOWR('f', CH_GET_UP_LA, struct ch_up_la)
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#define CHELSIO_GET_UP_IOQS _IOWR('f', CH_GET_UP_IOQS, struct ch_up_ioqs)
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#endif
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