Marius Strobl 00ff5de585 - Apparently, r186520 was just wrong and the clock of Oxford OX16PCI958 is ... neither DEFAULT_RCLK * 2 nor DEFAULT_RCLK * 10 but plain DEFAULT_RCLK and there's no (open) source indicating otherwise. This was tested with an EXSYS EX-41098-2, whose clock is not configurable and identifies as: puc0@pci0:5:1:0: class=0x070200 card=0x06711415 chip=0x95381415 rev=0x01 hdr=0x00 vendor = 'Oxford Semiconductor Ltd' class = simple comms subclass = multiport serial Note that this exactly matches the card mentioned in PR 129665 so no sub-device/sub-vendor based quirking of the latter is possible. So maybe we should grow some sort of tunable, in case non-default cards such as the latter aren't configurable either (this also wouldn't be the first time an allegedly tested commit turns out to be wrong though). - Make the TiMedia tables const. MFC after: 1 week		2013-03-01 20:16:06 +00:00
..
puc_bfe.h	Add location and pnpinfo strings for puc device ports. The location is	2011-06-14 18:19:48 +00:00
puc_bus.h
puc_cfg.c
puc_cfg.h	- Change back "d_ofs" to int8_t to not pessimize padding and size of "struct puc_cfg".	2012-07-31 05:23:23 +00:00
puc_pccard.c	- There's no need to overwrite the default device method with the default	2011-11-22 21:28:20 +00:00
puc_pci.c	- There's no need to overwrite the default device method with the default	2011-11-22 21:28:20 +00:00
puc.c	Do not require a filter-only interrupt handler for puc ports that are not	2013-01-15 20:13:25 +00:00
pucdata.c	- Apparently, r186520 was just wrong and the clock of Oxford OX16PCI958 is	2013-03-01 20:16:06 +00:00