Marius Strobl 9d769eb369 Clear any possibly pending PCI error bits left by the firmware. These ...

could trigger an error interrupt that we can't actually to do anything
against as soon as enabling the error handlers.
While at it don't bother about writing only to the write-one-to-clear
bits when clearing error bits.

2008-09-18 19:45:22 +00:00

..

apb.c

On sparc64 machines with multiple host-PCI-bridges these bridges

2008-04-17 12:38:00 +00:00

ofw_pci.h

cosmetic changes and style fixes

2008-08-22 20:28:19 +00:00

ofw_pcib_subr.c

On sparc64 machines with multiple host-PCI-bridges these bridges

2008-04-17 12:38:00 +00:00

ofw_pcib_subr.h

On sparc64 machines with multiple host-PCI-bridges these bridges

2008-04-17 12:38:00 +00:00

ofw_pcib.c

On sparc64 machines with multiple host-PCI-bridges these bridges

2008-04-17 12:38:00 +00:00

ofw_pcibus.c

The PCI specifications don't explain the details on how to calculate

2008-08-24 15:05:46 +00:00

psycho.c

Clear any possibly pending PCI error bits left by the firmware. These

2008-09-18 19:45:22 +00:00

psychoreg.h

Clear any possibly pending PCI error bits left by the firmware. These

2008-09-18 19:45:22 +00:00

psychovar.h

On sparc64 machines with multiple host-PCI-bridges these bridges

2008-04-17 12:38:00 +00:00