cfa2e9e703
message instead of relying on the fact that we are scheduled to send them. The old method worked 99.9% of the time, but someone reported some periferals that did MSG_REJECT at odd times (sometimes before we could send an SDTR or WDTR) that we would construe as the response to an SDTR or WDTR message. This also removes a possible race condition where after a bus reset (the result of a command time out not during intial probe time), we might queue two commands both requesting SDTR, WDTR or both.
153 lines
5.1 KiB
C
153 lines
5.1 KiB
C
/*
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* Interface to the generic driver for the aic7xxx based adaptec
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* SCSI controllers. This is used to implement product specific
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* probe and attach routines.
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*
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* Copyright (c) 1994, 1995 Justin T. Gibbs.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice immediately at the beginning of the file, without modification,
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* this list of conditions, and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Absolutely no warranty of function or purpose is made by the author
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* Justin T. Gibbs.
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* 4. Modifications may be freely made to this file if the above conditions
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* are met.
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*
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* $Id: aic7xxx.h,v 1.2 1995/01/16 16:33:47 gibbs Exp $
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*/
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#ifndef _AIC7XXX_H_
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#define _AIC7XXX_H_
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#include "ahc.h" /* for NAHC from config */
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#define AHC_NSEG 256 /* number of dma segments supported */
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#define AHC_SCB_MAX 16 /*
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* Up to 16 SCBs on some types of aic7xxx based
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* boards. The aic7770 family only have 4
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*/
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/* #define AHCDEBUG */
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typedef unsigned long int physaddr;
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extern int ahc_unit;
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struct ahc_dma_seg {
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physaddr addr;
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long len;
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};
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typedef enum {
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AHC_274, /* Single Channel */
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AHC_274T, /* Twin Channel */
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AHC_274W, /* Wide Channel */
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AHC_284, /* VL Single Channel */
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AHC_284T, /* VL Twin Channel */
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AHC_284W, /* VL Wide Channel - Do these exist?? */
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AHC_294, /* PCI Single Channel */
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AHC_294T, /* PCI Twin Channel */
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AHC_294W /* PCI Wide Channel */
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}ahc_type;
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/*
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* The driver keeps up to four scb structures per card in memory. Only the
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* first 26 bytes of the structure are valid for the hardware, the rest used
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* for driver level bookeeping. The "__attribute ((packed))" tags ensure that
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* gcc does not attempt to pad the long ints in the structure to word
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* boundaries since the first 26 bytes of this structure must have the correct
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* offsets for the hardware to find them. The driver is further optimized
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* so that we only have to download the first 19 bytes since as long
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* as we always use S/G, the last fields should be zero anyway.
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*/
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struct scb {
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/* ------------ Begin hardware supported fields ---------------- */
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/*1*/ u_char control;
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#define SCB_NEEDWDTR 0x80 /* Initiate Wide Negotiation */
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#define SCB_NEEDSDTR 0x40 /* Initiate Sync Negotiation */
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#define SCB_NEEDDMA 0x08 /* SCB needs to be DMA'd from
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* from host memory
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*/
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#define SCB_TE 0x20 /* Tag enable */
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#define SCB_WAITING 0x06
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#define SCB_DIS 0x04
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#define SCB_TAG_TYPE 0x3
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#define SIMPLE_QUEUE 0x0
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#define HEAD_QUEUE 0x1
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#define OR_QUEUE 0x2
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/*2*/ u_char target_channel_lun; /* 4/1/3 bits */
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/*3*/ u_char SG_segment_count;
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/*7*/ physaddr SG_list_pointer __attribute__ ((packed));
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/*11*/ physaddr cmdpointer __attribute__ ((packed));
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/*12*/ u_char cmdlen;
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/*14*/ u_char RESERVED[2]; /* must be zero */
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/*15*/ u_char target_status;
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/*18*/ u_char residual_data_count[3];
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/*19*/ u_char residual_SG_segment_count;
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#define SCB_DOWN_SIZE 19 /* amount to actually download */
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/*23*/ physaddr data __attribute__ ((packed));
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/*26*/ u_char datalen[3];
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#define SCB_UP_SIZE 26 /* amount to actually upload */
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/*30*/ physaddr host_scb __attribute__ ((packed));
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#if 0
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/*
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* No real point in transferring this to the
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* SCB registers.
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*/
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unsigned char RESERVED[2];
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#endif
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/*-----------------end of hardware supported fields----------------*/
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struct scb *next; /* in free list */
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struct scsi_xfer *xs; /* the scsi_xfer for this cmd */
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int flags;
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#define SCB_FREE 0x00
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#define SCB_ACTIVE 0x01
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#define SCB_ABORTED 0x02
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#define SCB_IMMED 0x04
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#define SCB_IMMED_FAIL 0x08
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#define SCB_SENSE 0x10
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int position; /* Position in scbarray */
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struct ahc_dma_seg ahc_dma[AHC_NSEG] __attribute__ ((packed));
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struct scsi_sense sense_cmd; /* SCSI command block */
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};
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struct ahc_data {
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ahc_type type;
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int flags;
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#define AHC_INIT 0x01
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#define AHC_RUNNING 0x02
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u_long baseport;
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struct scb *scbarray[AHC_SCB_MAX]; /* Mirror boards scbarray */
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struct scb *free_scb;
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int our_id; /* our scsi id */
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int our_id_b; /* B channel scsi id */
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int vect;
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struct scb *immed_ecb; /* an outstanding immediete command */
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struct scsi_link sc_link;
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struct scsi_link sc_link_b; /* Second bus for Twin channel cards */
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u_short needsdtr_orig; /* Targets we initiate sync neg with */
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u_short needwdtr_orig; /* Targets we initiate wide neg with */
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u_short needsdtr; /* Current list of negotiated targets */
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u_short needwdtr; /* Current list of negotiated targets */
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u_short sdtrpending; /* Pending SDTR to these targets */
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u_short wdtrpending; /* Pending WDTR to these targets */
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int numscbs;
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u_char maxscbs;
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int unpause;
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};
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extern struct ahc_data *ahcdata[NAHC];
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int ahcprobe __P((int unit, u_long io_base, ahc_type type));
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int ahc_attach __P((int unit));
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int ahcintr();
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#endif /* _AIC7XXX_H_ */
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