27d1c65e8e
The T3 ASIC can provide an incoming packet's timestamp instead of its RSS hash. The timestamp is just a counter running off the card's clock. With a 175MHz clock an increment represents ~5.7ns and the 32 bit value wraps around in ~25s. # sysctl -d dev.cxgbc.0.pkt_timestamp dev.cxgbc.0.pkt_timestamp: provide packet timestamp instead of connection hash # sysctl -d dev.cxgbc.0.core_clock dev.cxgbc.0.core_clock: core clock frequency (in KHz) # sysctl dev.cxgbc.0.core_clock dev.cxgbc.0.core_clock: 175000 |
||
---|---|---|
.. | ||
common | ||
sys | ||
ulp | ||
bin2h.pl | ||
cxgb_adapter.h | ||
cxgb_include.h | ||
cxgb_ioctl.h | ||
cxgb_main.c | ||
cxgb_offload.c | ||
cxgb_offload.h | ||
cxgb_osdep.h | ||
cxgb_sge.c | ||
cxgb_t3fw.c | ||
cxgb_t3fw.h | ||
t3b_protocol_sram.h | ||
t3b_tp_eeprom.h | ||
t3c_protocol_sram.h | ||
t3c_tp_eeprom.h | ||
t3cdev.h |