dc00c828e3
and instead add platform, firmware and EFI stubs to the loader. The net effect of this change is that besides a special console and disk driver, the kernel has no knowledge of the simulator. This has the following advantages: o Simulator support is much harder to break, o It's easier to make use of more feature complete simulators. This would only need a change in the simulator specific loader, o Running SMP kernels within the simulator. Note that ski at this time does not simulate IPIs, so there's no way to start APs. The platform, firmware and EFI stubs describe the following hardware: o 4 CPU Itanium, o 128 MB RAM within the 4GB address space, o 64 MB RAM above the 4GB address space. NOTE: The stubs in the skiloader describe a machine that should in parts be defined by the simulator. Things like processor interrupt block and AP wakeup vector cannot be choosen at random because they require interpretation by the simulator. Currently the simulator is ignorant of this. This change introduces an unofficial SSC call SSC_SAL_SET_VECTORS which is ignored by the simulator. Tested with: ski (version 0.943 for linux)
143 lines
4.1 KiB
C
143 lines
4.1 KiB
C
/*-
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* Copyright (c) 2001 Doug Rabson
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _MACHINE_SAL_H_
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#define _MACHINE_SAL_H_
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struct sal_system_table {
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char sal_signature[4];
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#define SAL_SIGNATURE "SST_"
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u_int32_t sal_length;
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u_int8_t sal_rev[2];
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u_int16_t sal_entry_count;
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u_int8_t sal_checksum;
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u_int8_t sal_reserved1[7];
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u_int8_t sal_a_version[2];
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u_int8_t sal_b_version[2];
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char sal_oem_id[32];
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char sal_product_id[32];
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u_int8_t sal_reserved2[8];
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};
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struct sal_entrypoint_descriptor {
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u_int8_t sale_type; /* == 0 */
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u_int8_t sale_reserved1[7];
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u_int64_t sale_pal_proc;
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u_int64_t sale_sal_proc;
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u_int64_t sale_sal_gp;
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u_int8_t sale_reserved2[16];
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};
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struct sal_memory_descriptor {
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u_int8_t sale_type; /* == 1 */
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u_int8_t sale_need_virtual;
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u_int8_t sale_current_attribute;
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u_int8_t sale_access_rights;
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u_int8_t sale_supported_attributes;
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u_int8_t sale_reserved1;
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u_int8_t sale_memory_type[2];
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u_int64_t sale_physical_address;
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u_int32_t sale_length;
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u_int8_t sale_reserved2[12];
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};
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struct sal_platform_descriptor {
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u_int8_t sale_type; /* == 2 */
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u_int8_t sale_features;
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u_int8_t sale_reserved[14];
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};
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struct sal_tr_descriptor {
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u_int8_t sale_type; /* == 3 */
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u_int8_t sale_register_type;
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u_int8_t sale_register_number;
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u_int8_t sale_reserved1[5];
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u_int64_t sale_virtual_address;
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u_int64_t sale_page_size;
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u_int8_t sale_reserved2[8];
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};
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struct sal_ptc_cache_descriptor {
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u_int8_t sale_type; /* == 4 */
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u_int8_t sale_reserved[3];
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u_int32_t sale_domains;
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u_int64_t sale_address;
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};
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struct sal_ap_wakeup_descriptor {
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u_int8_t sale_type; /* == 5 */
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u_int8_t sale_mechanism;
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u_int8_t sale_reserved[6];
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u_int64_t sale_vector;
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};
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/*
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* SAL Procedure numbers.
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*/
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#define SAL_SET_VECTORS 0x01000000
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#define SAL_GET_STATE_INFO 0x01000001
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#define SAL_GET_STATE_INFO_SIZE 0x01000002
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#define SAL_CLEAR_STATE_INFO 0x01000003
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#define SAL_MC_RENDEZ 0x01000004
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#define SAL_MC_SET_PARAMS 0x01000005
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#define SAL_REGISTER_PHYSICAL_ADDR 0x01000006
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#define SAL_CACHE_FLUSH 0x01000008
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#define SAL_CACHE_INIT 0x01000009
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#define SAL_PCI_CONFIG_READ 0x01000010
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#define SAL_PCI_CONFIG_WRITE 0x01000011
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#define SAL_FREQ_BASE 0x01000012
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#define SAL_UPDATE_PAL 0x01000020
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/* SAL_SET_VECTORS event handler types */
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#define SAL_OS_MCA 0
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#define SAL_OS_INIT 1
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#define SAL_OS_BOOT_RENDEZ 2
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/* SAL_GET_STATE_INFO, SAL_GET_STATE_INFO_SIZE types */
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#define SAL_INFO_MCA 0
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#define SAL_INFO_INIT 1
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#define SAL_INFO_CMC 2
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#define SAL_INFO_CPE 3
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#define SAL_INFO_TYPES 4 /* number of types we know about */
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struct ia64_sal_result {
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int64_t sal_status;
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u_int64_t sal_result[3];
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};
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typedef struct ia64_sal_result sal_entry_t
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(u_int64_t, u_int64_t, u_int64_t, u_int64_t,
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u_int64_t, u_int64_t, u_int64_t, u_int64_t);
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extern sal_entry_t *ia64_sal_entry;
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extern void ia64_sal_init(struct sal_system_table *saltab);
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#endif /* _MACHINE_SAL_H_ */
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