509 lines
14 KiB
C
509 lines
14 KiB
C
/*
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* Copyright (c) 1996 Andrew Gordon. All rights reserved.
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*
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* Copyright (c) 1997, 1999 Hellmuth Michaelis. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the author nor the names of any co-contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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* 4. Altered versions must be plainly marked as such, and must not be
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* misrepresented as being the original software and/or documentation.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*---------------------------------------------------------------------------
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*
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* i4b_avm_a1.c - AVM A1/Fritz passive card driver for isdn4bsd
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* ------------------------------------------------------------
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*
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* $Id: i4b_avm_a1.c,v 1.21 1999/02/14 09:44:58 hm Exp $
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*
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* last edit-date: [Sun Feb 14 10:25:11 1999]
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*
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*---------------------------------------------------------------------------*/
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#if defined(__FreeBSD__)
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#include "isic.h"
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#include "opt_i4b.h"
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#else
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#define NISIC 1
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#endif
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#if NISIC > 0 && defined(AVM_A1)
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#include <sys/param.h>
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#if defined(__FreeBSD__) && __FreeBSD__ >= 3
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#include <sys/ioccom.h>
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#else
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#include <sys/ioctl.h>
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#endif
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/mbuf.h>
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#ifdef __FreeBSD__
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#include <machine/clock.h>
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#include <i386/isa/isa_device.h>
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#else
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#include <machine/bus.h>
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#include <sys/device.h>
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#endif
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#include <sys/socket.h>
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#include <net/if.h>
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#ifdef __FreeBSD__
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#include <machine/i4b_debug.h>
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#include <machine/i4b_ioctl.h>
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#else
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#include <i4b/i4b_debug.h>
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#include <i4b/i4b_ioctl.h>
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#endif
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#include <i4b/include/i4b_global.h>
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#include <i4b/layer1/i4b_l1.h>
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#include <i4b/layer1/i4b_isac.h>
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#include <i4b/layer1/i4b_hscx.h>
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#ifndef __FreeBSD__
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static u_int8_t avma1_read_reg __P((struct isic_softc *sc, int what, bus_size_t offs));
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static void avma1_write_reg __P((struct isic_softc *sc, int what, bus_size_t offs, u_int8_t data));
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static void avma1_read_fifo __P((struct isic_softc *sc, int what, void *buf, size_t size));
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static void avma1_write_fifo __P((struct isic_softc *sc, int what, const void *data, size_t size));
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#endif
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/*---------------------------------------------------------------------------*
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* AVM A1 and AVM Fritz! Card special registers
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*---------------------------------------------------------------------------*/
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#define AVM_CONF_REG 0x1800 /* base offset for config register */
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#define AVM_CONF_IRQ 0x1801 /* base offset for IRQ register */
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/* config register write */
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#define AVM_CONF_WR_RESET 0x01 /* 1 = RESET ISAC and HSCX */
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#define AVM_CONF_WR_CCL 0x02 /* 1 = clear counter low nibble */
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#define AVM_CONF_WR_CCH 0x04 /* 1 = clear counter high nibble */
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#define AVM_CONF_WR_IRQEN 0x08 /* 1 = enable IRQ */
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#define AVM_CONF_WR_TEST 0x10 /* test bit */
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/* config register read */
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#define AVM_CONF_RD_IIRQ 0x01 /* 0 = ISAC IRQ active */
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#define AVM_CONF_RD_HIRQ 0x02 /* 0 = HSCX IRQ active */
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#define AVM_CONF_RD_CIRQ 0x04 /* 0 = counter IRQ active */
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#define AVM_CONF_RD_ZER1 0x08 /* unused, always read 0 */
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#define AVM_CONF_RD_TEST 0x10 /* test bit read back */
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#define AVM_CONF_RD_ZER2 0x20 /* unused, always read 0 */
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/*---------------------------------------------------------------------------*
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* AVM read fifo routines
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*---------------------------------------------------------------------------*/
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#ifdef __FreeBSD__
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static void
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avma1_read_fifo(void *buf, const void *base, size_t len)
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{
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insb((int)base - 0x3e0, (u_char *)buf, (u_int)len);
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}
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#else
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static void
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avma1_read_fifo(struct isic_softc *sc, int what, void *buf, size_t size)
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{
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bus_space_tag_t t = sc->sc_maps[what+4].t;
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bus_space_handle_t h = sc->sc_maps[what+4].h;
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bus_space_read_multi_1(t, h, 0, buf, size);
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}
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#endif
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/*---------------------------------------------------------------------------*
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* AVM write fifo routines
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*---------------------------------------------------------------------------*/
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#ifdef __FreeBSD__
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static void
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avma1_write_fifo(void *base, const void *buf, size_t len)
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{
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outsb((int)base - 0x3e0, (u_char *)buf, (u_int)len);
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}
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#else
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static void
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avma1_write_fifo(struct isic_softc *sc, int what, const void *buf, size_t size)
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{
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bus_space_tag_t t = sc->sc_maps[what+4].t;
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bus_space_handle_t h = sc->sc_maps[what+4].h;
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bus_space_write_multi_1(t, h, 0, (u_int8_t*)buf, size);
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}
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#endif
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/*---------------------------------------------------------------------------*
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* AVM write register routines
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*---------------------------------------------------------------------------*/
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#ifdef __FreeBSD__
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static void
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avma1_write_reg(u_char *base, u_int offset, u_int v)
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{
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outb((int)base + offset, (u_char)v);
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}
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#else
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static void
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avma1_write_reg(struct isic_softc *sc, int what, bus_size_t offs, u_int8_t data)
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{
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bus_space_tag_t t = sc->sc_maps[what+1].t;
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bus_space_handle_t h = sc->sc_maps[what+1].h;
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bus_space_write_1(t, h, offs, data);
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}
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#endif
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/*---------------------------------------------------------------------------*
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* AVM read register routines
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*---------------------------------------------------------------------------*/
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#ifdef __FreeBSD__
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static u_char
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avma1_read_reg(u_char *base, u_int offset)
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{
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return (inb((int)base + offset));
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}
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#else
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static u_int8_t
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avma1_read_reg(struct isic_softc *sc, int what, bus_size_t offs)
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{
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bus_space_tag_t t = sc->sc_maps[what+1].t;
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bus_space_handle_t h = sc->sc_maps[what+1].h;
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return bus_space_read_1(t, h, offs);
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}
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#endif
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/*---------------------------------------------------------------------------*
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* isic_probe_avma1 - probe for AVM A1 and compatibles
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*---------------------------------------------------------------------------*/
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#ifdef __FreeBSD__
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int
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isic_probe_avma1(struct isa_device *dev)
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{
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struct isic_softc *sc = &isic_sc[dev->id_unit];
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u_char savebyte;
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u_char byte;
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/* check max unit range */
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if(dev->id_unit >= ISIC_MAXUNIT)
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{
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printf("isic%d: Error, unit %d >= ISIC_MAXUNIT for AVM A1/Fritz!\n",
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dev->id_unit, dev->id_unit);
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return(0);
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}
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sc->sc_unit = dev->id_unit;
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/* check IRQ validity */
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switch(ffs(dev->id_irq)-1)
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{
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case 3:
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case 4:
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case 5:
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case 6:
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case 7:
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case 8:
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case 10:
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case 11:
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case 12:
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case 13:
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case 14:
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case 15:
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break;
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default:
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printf("isic%d: Error, invalid IRQ [%d] specified for AVM A1/Fritz!\n",
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dev->id_unit, ffs(dev->id_irq)-1);
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return(0);
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break;
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}
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sc->sc_irq = dev->id_irq;
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/* check if memory addr specified */
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if(dev->id_maddr)
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{
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printf("isic%d: Error, mem addr 0x%lx specified for AVM A1/Fritz!\n",
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dev->id_unit, (u_long)dev->id_maddr);
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return(0);
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}
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dev->id_msize = 0;
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/* check if we got an iobase */
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switch(dev->id_iobase)
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{
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case 0x200:
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case 0x240:
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case 0x300:
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case 0x340:
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break;
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default:
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printf("isic%d: Error, invalid iobase 0x%x specified for AVM A1/Fritz!\n",
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dev->id_unit, dev->id_iobase);
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return(0);
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break;
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}
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sc->sc_port = dev->id_iobase;
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sc->clearirq = NULL;
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sc->readreg = avma1_read_reg;
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sc->writereg = avma1_write_reg;
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sc->readfifo = avma1_read_fifo;
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sc->writefifo = avma1_write_fifo;
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/* setup card type */
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sc->sc_cardtyp = CARD_TYPEP_AVMA1;
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/* setup IOM bus type */
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sc->sc_bustyp = BUS_TYPE_IOM2;
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sc->sc_ipac = 0;
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sc->sc_bfifolen = HSCX_FIFO_LEN;
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/* setup ISAC and HSCX base addr */
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ISAC_BASE = (caddr_t)dev->id_iobase + 0x1400 - 0x20;
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HSCX_A_BASE = (caddr_t)dev->id_iobase + 0x400 - 0x20;
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HSCX_B_BASE = (caddr_t)dev->id_iobase + 0xc00 - 0x20;
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/*
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* Read HSCX A/B VSTR.
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* Expected value for AVM A1 is 0x04 or 0x05 and for the
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* AVM Fritz!Card is 0x05 in the least significant bits.
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*/
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if( (((HSCX_READ(0, H_VSTR) & 0xf) != 0x5) &&
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((HSCX_READ(0, H_VSTR) & 0xf) != 0x4)) ||
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(((HSCX_READ(1, H_VSTR) & 0xf) != 0x5) &&
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((HSCX_READ(1, H_VSTR) & 0xf) != 0x4)) )
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{
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printf("isic%d: HSCX VSTR test failed for AVM A1/Fritz\n",
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dev->id_unit);
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printf("isic%d: HSC0: VSTR: %#x\n",
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dev->id_unit, HSCX_READ(0, H_VSTR));
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printf("isic%d: HSC1: VSTR: %#x\n",
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dev->id_unit, HSCX_READ(1, H_VSTR));
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return (0);
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}
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/* AVM A1 or Fritz! control register bits: */
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/* read write */
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/* 0x01 hscx irq* RESET */
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/* 0x02 isac irq* clear counter1 */
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/* 0x04 counter irq* clear counter2 */
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/* 0x08 always 0 irq enable */
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/* 0x10 read test bit set test bit */
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/* 0x20 always 0 unused */
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/*
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* XXX the following test may be destructive, to prevent the
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* worst case, we save the byte first, and in case the test
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* fails, we write back the saved byte .....
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*/
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savebyte = inb(dev->id_iobase + AVM_CONF_REG);
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/* write low to test bit */
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outb(dev->id_iobase + AVM_CONF_REG, 0x00);
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/* test bit and next higher and lower bit must be 0 */
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if((byte = inb(dev->id_iobase + AVM_CONF_REG) & 0x38) != 0x00)
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{
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printf("isic%d: Error, probe-1 failed, 0x%02x should be 0x00 for AVM A1/Fritz!\n",
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dev->id_unit, byte);
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outb(dev->id_iobase + AVM_CONF_REG, savebyte);
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return (0);
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}
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/* write high to test bit */
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outb(dev->id_iobase + AVM_CONF_REG, 0x10);
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/* test bit must be high, next higher and lower bit must be 0 */
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if((byte = inb(dev->id_iobase + AVM_CONF_REG) & 0x38) != 0x10)
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{
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printf("isic%d: Error, probe-2 failed, 0x%02x should be 0x10 for AVM A1/Fritz!\n",
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dev->id_unit, byte);
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outb(dev->id_iobase + AVM_CONF_REG, savebyte);
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return (0);
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}
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return (1);
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}
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#else
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int
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isic_probe_avma1(struct isic_attach_args *ia)
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{
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u_int8_t savebyte, v1, v2;
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/*
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* Read HSCX A/B VSTR.
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* Expected value for AVM A1 is 0x04 or 0x05 and for the
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* AVM Fritz!Card is 0x05 in the least significant bits.
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*/
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v1 = bus_space_read_1(ia->ia_maps[ISIC_WHAT_HSCXA+1].t, ia->ia_maps[ISIC_WHAT_HSCXA+1].h, H_VSTR) & 0x0f;
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v2 = bus_space_read_1(ia->ia_maps[ISIC_WHAT_HSCXB+1].t, ia->ia_maps[ISIC_WHAT_HSCXB+1].h, H_VSTR) & 0x0f;
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if (v1 != v2 || (v1 != 0x05 && v1 != 0x04))
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return 0;
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/* AVM A1 or Fritz! control register bits: */
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/* read write */
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/* 0x01 hscx irq* RESET */
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/* 0x02 isac irq* clear counter1 */
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/* 0x04 counter irq* clear counter2 */
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/* 0x08 always 0 irq enable */
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/* 0x10 read test bit set test bit */
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/* 0x20 always 0 unused */
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/*
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* XXX the following test may be destructive, to prevent the
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* worst case, we save the byte first, and in case the test
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* fails, we write back the saved byte .....
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*/
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savebyte = bus_space_read_1(ia->ia_maps[0].t, ia->ia_maps[0].h, 0);
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/* write low to test bit */
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bus_space_write_1(ia->ia_maps[0].t, ia->ia_maps[0].h, 0, 0);
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/* test bit and next higher and lower bit must be 0 */
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if((bus_space_read_1(ia->ia_maps[0].t, ia->ia_maps[0].h, 0) & 0x38) != 0x00)
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{
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bus_space_write_1(ia->ia_maps[0].t, ia->ia_maps[0].h, 0, savebyte);
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return 0;
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}
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/* write high to test bit */
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bus_space_write_1(ia->ia_maps[0].t, ia->ia_maps[0].h, 0, 0x10);
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/* test bit must be high, next higher and lower bit must be 0 */
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if((bus_space_read_1(ia->ia_maps[0].t, ia->ia_maps[0].h, 0) & 0x38) != 0x10)
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{
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bus_space_write_1(ia->ia_maps[0].t, ia->ia_maps[0].h, 0, savebyte);
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return 0;
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}
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return (1);
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}
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#endif
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/*---------------------------------------------------------------------------*
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* isic_attach_avma1 - attach AVM A1 and compatibles
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*---------------------------------------------------------------------------*/
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#ifdef __FreeBSD__
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int
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isic_attach_avma1(struct isa_device *dev)
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{
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struct isic_softc *sc = &isic_sc[dev->id_unit];
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/* reset the HSCX and ISAC chips */
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outb(dev->id_iobase + AVM_CONF_REG, 0x00);
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DELAY(SEC_DELAY / 10);
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outb(dev->id_iobase + AVM_CONF_REG, AVM_CONF_WR_RESET);
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DELAY(SEC_DELAY / 10);
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outb(dev->id_iobase + AVM_CONF_REG, 0x00);
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DELAY(SEC_DELAY / 10);
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/* setup IRQ */
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outb(dev->id_iobase + AVM_CONF_IRQ, (ffs(sc->sc_irq)) - 1);
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DELAY(SEC_DELAY / 10);
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/* enable IRQ, disable counter IRQ */
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outb(dev->id_iobase + AVM_CONF_REG, AVM_CONF_WR_IRQEN |
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AVM_CONF_WR_CCH | AVM_CONF_WR_CCL);
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DELAY(SEC_DELAY / 10);
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return (1);
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}
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#else
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int
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isic_attach_avma1(struct isic_softc *sc)
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{
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bus_space_tag_t t = sc->sc_maps[0].t;
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bus_space_handle_t h = sc->sc_maps[0].h;
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sc->clearirq = NULL;
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sc->readreg = avma1_read_reg;
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sc->writereg = avma1_write_reg;
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sc->readfifo = avma1_read_fifo;
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sc->writefifo = avma1_write_fifo;
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/* setup card type */
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sc->sc_cardtyp = CARD_TYPEP_AVMA1;
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/* setup IOM bus type */
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sc->sc_bustyp = BUS_TYPE_IOM2;
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sc->sc_ipac = 0;
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sc->sc_bfifolen = HSCX_FIFO_LEN;
|
|
|
|
/* reset the HSCX and ISAC chips */
|
|
|
|
bus_space_write_1(t, h, 0, 0x00);
|
|
DELAY(SEC_DELAY / 10);
|
|
|
|
bus_space_write_1(t, h, 0, AVM_CONF_WR_RESET);
|
|
DELAY(SEC_DELAY / 10);
|
|
|
|
bus_space_write_1(t, h, 0, 0x00);
|
|
DELAY(SEC_DELAY / 10);
|
|
|
|
/* setup IRQ */
|
|
|
|
bus_space_write_1(t, h, 1, sc->sc_irq);
|
|
DELAY(SEC_DELAY / 10);
|
|
|
|
/* enable IRQ, disable counter IRQ */
|
|
|
|
bus_space_write_1(t, h, 0, AVM_CONF_WR_IRQEN |
|
|
AVM_CONF_WR_CCH | AVM_CONF_WR_CCL);
|
|
DELAY(SEC_DELAY / 10);
|
|
|
|
return (1);
|
|
}
|
|
#endif
|
|
|
|
#endif /* ISIC > 0 */
|