018101a836
sdhci_fdt. Enable the SDHCI controller, bus and devices on ARMADA38X kernel. Tested on: ClearFog Pro Reviewed by: Marcin Wojtas <mw at semihalf.com> Sponsored by: Rubicon Communications, LLC (Netgate) Differential Revision: https://reviews.freebsd.org/D10606
348 lines
9.3 KiB
C
348 lines
9.3 KiB
C
/*-
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* Copyright (c) 2012 Thomas Skibo
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* Copyright (c) 2008 Alexander Motin <mav@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/* Generic driver to attach sdhci controllers on simplebus.
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* Derived mainly from sdhci_pci.c
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/lock.h>
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#include <sys/module.h>
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#include <sys/mutex.h>
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#include <sys/resource.h>
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#include <sys/rman.h>
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#include <sys/sysctl.h>
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#include <sys/taskqueue.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <dev/fdt/fdt_common.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/mmc/bridge.h>
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#include <dev/sdhci/sdhci.h>
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#include "mmcbr_if.h"
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#include "sdhci_if.h"
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#define MAX_SLOTS 6
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#define SDHCI_FDT_ARMADA38X 1
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#define SDHCI_FDT_GENERIC 2
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#define SDHCI_FDT_XLNX_ZY7 3
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static struct ofw_compat_data compat_data[] = {
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{ "marvell,armada-380-sdhci", SDHCI_FDT_ARMADA38X },
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{ "sdhci_generic", SDHCI_FDT_GENERIC },
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{ "xlnx,zy7_sdhci", SDHCI_FDT_XLNX_ZY7 },
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{ NULL, 0 }
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};
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struct sdhci_fdt_softc {
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device_t dev; /* Controller device */
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u_int quirks; /* Chip specific quirks */
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u_int caps; /* If we override SDHCI_CAPABILITIES */
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uint32_t max_clk; /* Max possible freq */
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struct resource *irq_res; /* IRQ resource */
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void *intrhand; /* Interrupt handle */
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int num_slots; /* Number of slots on this controller*/
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struct sdhci_slot slots[MAX_SLOTS];
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struct resource *mem_res[MAX_SLOTS]; /* Memory resource */
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bool wp_inverted; /* WP pin is inverted */
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bool no_18v; /* No 1.8V support */
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};
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static uint8_t
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sdhci_fdt_read_1(device_t dev, struct sdhci_slot *slot, bus_size_t off)
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{
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struct sdhci_fdt_softc *sc = device_get_softc(dev);
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return (bus_read_1(sc->mem_res[slot->num], off));
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}
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static void
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sdhci_fdt_write_1(device_t dev, struct sdhci_slot *slot, bus_size_t off,
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uint8_t val)
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{
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struct sdhci_fdt_softc *sc = device_get_softc(dev);
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bus_write_1(sc->mem_res[slot->num], off, val);
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}
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static uint16_t
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sdhci_fdt_read_2(device_t dev, struct sdhci_slot *slot, bus_size_t off)
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{
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struct sdhci_fdt_softc *sc = device_get_softc(dev);
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return (bus_read_2(sc->mem_res[slot->num], off));
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}
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static void
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sdhci_fdt_write_2(device_t dev, struct sdhci_slot *slot, bus_size_t off,
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uint16_t val)
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{
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struct sdhci_fdt_softc *sc = device_get_softc(dev);
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bus_write_2(sc->mem_res[slot->num], off, val);
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}
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static uint32_t
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sdhci_fdt_read_4(device_t dev, struct sdhci_slot *slot, bus_size_t off)
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{
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struct sdhci_fdt_softc *sc = device_get_softc(dev);
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uint32_t val32;
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val32 = bus_read_4(sc->mem_res[slot->num], off);
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if (off == SDHCI_CAPABILITIES && sc->no_18v)
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val32 &= ~SDHCI_CAN_VDD_180;
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return (val32);
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}
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static void
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sdhci_fdt_write_4(device_t dev, struct sdhci_slot *slot, bus_size_t off,
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uint32_t val)
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{
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struct sdhci_fdt_softc *sc = device_get_softc(dev);
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bus_write_4(sc->mem_res[slot->num], off, val);
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}
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static void
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sdhci_fdt_read_multi_4(device_t dev, struct sdhci_slot *slot,
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bus_size_t off, uint32_t *data, bus_size_t count)
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{
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struct sdhci_fdt_softc *sc = device_get_softc(dev);
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bus_read_multi_4(sc->mem_res[slot->num], off, data, count);
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}
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static void
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sdhci_fdt_write_multi_4(device_t dev, struct sdhci_slot *slot,
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bus_size_t off, uint32_t *data, bus_size_t count)
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{
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struct sdhci_fdt_softc *sc = device_get_softc(dev);
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bus_write_multi_4(sc->mem_res[slot->num], off, data, count);
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}
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static void
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sdhci_fdt_intr(void *arg)
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{
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struct sdhci_fdt_softc *sc = (struct sdhci_fdt_softc *)arg;
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int i;
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for (i = 0; i < sc->num_slots; i++)
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sdhci_generic_intr(&sc->slots[i]);
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}
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static int
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sdhci_fdt_get_ro(device_t bus, device_t dev)
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{
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struct sdhci_fdt_softc *sc = device_get_softc(bus);
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return (sdhci_generic_get_ro(bus, dev) ^ sc->wp_inverted);
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}
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static int
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sdhci_fdt_probe(device_t dev)
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{
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struct sdhci_fdt_softc *sc = device_get_softc(dev);
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phandle_t node;
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pcell_t cid;
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sc->quirks = 0;
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sc->num_slots = 1;
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sc->max_clk = 0;
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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switch (ofw_bus_search_compatible(dev, compat_data)->ocd_data) {
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case SDHCI_FDT_ARMADA38X:
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sc->quirks = SDHCI_QUIRK_BROKEN_AUTO_STOP;
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device_set_desc(dev, "ARMADA38X SDHCI controller");
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break;
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case SDHCI_FDT_GENERIC:
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device_set_desc(dev, "generic fdt SDHCI controller");
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break;
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case SDHCI_FDT_XLNX_ZY7:
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sc->quirks = SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK;
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device_set_desc(dev, "Zynq-7000 generic fdt SDHCI controller");
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break;
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default:
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return (ENXIO);
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}
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node = ofw_bus_get_node(dev);
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/* Allow dts to patch quirks, slots, and max-frequency. */
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if ((OF_getencprop(node, "quirks", &cid, sizeof(cid))) > 0)
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sc->quirks = cid;
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if ((OF_getencprop(node, "num-slots", &cid, sizeof(cid))) > 0)
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sc->num_slots = cid;
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if ((OF_getencprop(node, "max-frequency", &cid, sizeof(cid))) > 0)
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sc->max_clk = cid;
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if (OF_hasprop(node, "no-1-8-v"))
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sc->no_18v = true;
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if (OF_hasprop(node, "wp-inverted"))
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sc->wp_inverted = true;
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return (0);
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}
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static int
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sdhci_fdt_attach(device_t dev)
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{
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struct sdhci_fdt_softc *sc = device_get_softc(dev);
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struct sdhci_slot *slot;
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int err, slots, rid, i;
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sc->dev = dev;
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/* Allocate IRQ. */
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rid = 0;
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sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
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RF_ACTIVE);
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if (sc->irq_res == NULL) {
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device_printf(dev, "Can't allocate IRQ\n");
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return (ENOMEM);
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}
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/* Scan all slots. */
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slots = sc->num_slots; /* number of slots determined in probe(). */
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sc->num_slots = 0;
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for (i = 0; i < slots; i++) {
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slot = &sc->slots[sc->num_slots];
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/* Allocate memory. */
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rid = 0;
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sc->mem_res[i] = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
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&rid, RF_ACTIVE);
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if (sc->mem_res[i] == NULL) {
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device_printf(dev,
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"Can't allocate memory for slot %d\n", i);
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continue;
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}
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slot->quirks = sc->quirks;
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slot->caps = sc->caps;
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slot->max_clk = sc->max_clk;
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if (sdhci_init_slot(dev, slot, i) != 0)
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continue;
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sc->num_slots++;
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}
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device_printf(dev, "%d slot(s) allocated\n", sc->num_slots);
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/* Activate the interrupt */
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err = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC | INTR_MPSAFE,
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NULL, sdhci_fdt_intr, sc, &sc->intrhand);
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if (err) {
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device_printf(dev, "Cannot setup IRQ\n");
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return (err);
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}
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/* Process cards detection. */
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for (i = 0; i < sc->num_slots; i++)
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sdhci_start_slot(&sc->slots[i]);
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return (0);
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}
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static int
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sdhci_fdt_detach(device_t dev)
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{
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struct sdhci_fdt_softc *sc = device_get_softc(dev);
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int i;
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bus_generic_detach(dev);
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bus_teardown_intr(dev, sc->irq_res, sc->intrhand);
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bus_release_resource(dev, SYS_RES_IRQ, rman_get_rid(sc->irq_res),
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sc->irq_res);
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for (i = 0; i < sc->num_slots; i++) {
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sdhci_cleanup_slot(&sc->slots[i]);
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bus_release_resource(dev, SYS_RES_MEMORY,
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rman_get_rid(sc->mem_res[i]), sc->mem_res[i]);
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}
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return (0);
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}
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static device_method_t sdhci_fdt_methods[] = {
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/* device_if */
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DEVMETHOD(device_probe, sdhci_fdt_probe),
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DEVMETHOD(device_attach, sdhci_fdt_attach),
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DEVMETHOD(device_detach, sdhci_fdt_detach),
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/* Bus interface */
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DEVMETHOD(bus_read_ivar, sdhci_generic_read_ivar),
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DEVMETHOD(bus_write_ivar, sdhci_generic_write_ivar),
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/* mmcbr_if */
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DEVMETHOD(mmcbr_update_ios, sdhci_generic_update_ios),
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DEVMETHOD(mmcbr_request, sdhci_generic_request),
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DEVMETHOD(mmcbr_get_ro, sdhci_fdt_get_ro),
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DEVMETHOD(mmcbr_acquire_host, sdhci_generic_acquire_host),
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DEVMETHOD(mmcbr_release_host, sdhci_generic_release_host),
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/* SDHCI registers accessors */
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DEVMETHOD(sdhci_read_1, sdhci_fdt_read_1),
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DEVMETHOD(sdhci_read_2, sdhci_fdt_read_2),
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DEVMETHOD(sdhci_read_4, sdhci_fdt_read_4),
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DEVMETHOD(sdhci_read_multi_4, sdhci_fdt_read_multi_4),
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DEVMETHOD(sdhci_write_1, sdhci_fdt_write_1),
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DEVMETHOD(sdhci_write_2, sdhci_fdt_write_2),
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DEVMETHOD(sdhci_write_4, sdhci_fdt_write_4),
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DEVMETHOD(sdhci_write_multi_4, sdhci_fdt_write_multi_4),
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DEVMETHOD_END
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};
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static driver_t sdhci_fdt_driver = {
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"sdhci_fdt",
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sdhci_fdt_methods,
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sizeof(struct sdhci_fdt_softc),
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};
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static devclass_t sdhci_fdt_devclass;
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DRIVER_MODULE(sdhci_fdt, simplebus, sdhci_fdt_driver, sdhci_fdt_devclass,
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NULL, NULL);
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MODULE_DEPEND(sdhci_fdt, sdhci, 1, 1, 1);
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MMC_DECLARE_BRIDGE(sdhci_fdt);
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