9e2eaa64d7
The flowdirector feature shares on-chip memory with other things such as the RX buffers. In theory it should be configured in a way that doesn't interfere with the rest of operation. In practice, the RX buffer calculation didn't take the flow-director allocation into account and there'd be overlap. This lead to various garbage frames being received containing what looks like internal NIC state. What _I_ saw was traffic ending up in the wrong RX queues. If I was doing a UDP traffic test with only one NIC ring receiving traffic, everything is fine. If I fired up a second UDP stream which came in on another ring, there'd be a few percent of traffic from both rings ending up in the wrong ring. Ie, the RSS hash would indicate it was supposed to come in ring X, but it'd come in ring Y. However, when the allocation was fixed up, the developers at Verisign still saw traffic stalls. The flowdirector feature ends up fiddling with the NIC to do various attempts at load balancing connections by populating flow table rules based on sampled traffic. It's likely that all of that has to be carefully reviewed and made less "magic". So for now the flow director feature is disabled (which fixes both what I was seeing and what they were seeing) until it's all much more debugged and verified. Tested: * (me) 82599EB 2x10G NIC, RSS UDP testing. * (verisign) not sure on the NIC (but likely 82599), 100k-200k/sec TCP transaction tests. Submitted by: Marc De La Gueronniere <mdelagueronniere@verisign.com> MFC after: 1 week Sponsored by: Verisign, Inc.
16 lines
441 B
Makefile
16 lines
441 B
Makefile
#$FreeBSD$
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.PATH: ${.CURDIR}/../../dev/ixgbe
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KMOD = if_ixgbe
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SRCS = device_if.h bus_if.h pci_if.h
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SRCS += opt_inet.h opt_inet6.h opt_rss.h
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SRCS += ixgbe.c ixv.c
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# Shared source
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SRCS += ixgbe_common.c ixgbe_api.c ixgbe_phy.c ixgbe_mbx.c ixgbe_vf.c
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SRCS += ixgbe_dcb.c ixgbe_dcb_82598.c ixgbe_dcb_82599.c
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SRCS += ixgbe_82599.c ixgbe_82598.c ixgbe_x540.c
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CFLAGS+= -I${.CURDIR}/../../dev/ixgbe -DSMP
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.include <bsd.kmod.mk>
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