155 lines
4.1 KiB
C
155 lines
4.1 KiB
C
/*-
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* Copyright (c) 2000, 2001 Michael Smith
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* Copyright (c) 2000 BSDi
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/*
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* 6.7 : Hardware Abstraction
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*/
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#include "acpi.h"
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#include <machine/bus_pio.h>
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#include <machine/bus.h>
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#include <machine/pci_cfgreg.h>
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/*
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* ACPICA's rather gung-ho approach to hardware resource ownership is a little
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* troublesome insofar as there is no easy way for us to know in advance
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* exactly which I/O resources it's going to want to use.
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*
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* In order to deal with this, we ignore resource ownership entirely, and simply
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* use the native I/O space accessor functionality. This is Evil, but it works.
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*
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* XXX use an intermediate #define for the tag/handle
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*/
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#ifdef __i386__
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#define ACPI_BUS_SPACE_IO I386_BUS_SPACE_IO
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#define ACPI_BUS_HANDLE 0
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#endif
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#ifdef __ia64__
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#define ACPI_BUS_SPACE_IO IA64_BUS_SPACE_IO
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#define ACPI_BUS_HANDLE 0
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#endif
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ACPI_STATUS
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AcpiOsReadPort (
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ACPI_IO_ADDRESS InPort,
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void *Value,
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UINT32 Width)
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{
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switch (Width) {
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case 8:
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*(u_int8_t *)Value = bus_space_read_1(ACPI_BUS_SPACE_IO, ACPI_BUS_HANDLE, InPort);
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break;
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case 16:
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*(u_int16_t *)Value = bus_space_read_2(ACPI_BUS_SPACE_IO, ACPI_BUS_HANDLE, InPort);
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break;
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case 32:
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*(u_int32_t *)Value = bus_space_read_4(ACPI_BUS_SPACE_IO, ACPI_BUS_HANDLE, InPort);
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break;
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default:
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/* debug trap goes here */
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}
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return(AE_OK);
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}
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ACPI_STATUS
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AcpiOsWritePort (
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ACPI_IO_ADDRESS OutPort,
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ACPI_INTEGER Value,
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UINT32 Width)
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{
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switch (Width) {
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case 8:
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bus_space_write_1(ACPI_BUS_SPACE_IO, ACPI_BUS_HANDLE, OutPort, Value);
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break;
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case 16:
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bus_space_write_2(ACPI_BUS_SPACE_IO, ACPI_BUS_HANDLE, OutPort, Value);
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break;
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case 32:
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bus_space_write_4(ACPI_BUS_SPACE_IO, ACPI_BUS_HANDLE, OutPort, Value);
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break;
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default:
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/* debug trap goes here */
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}
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return(AE_OK);
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}
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ACPI_STATUS
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AcpiOsReadPciConfiguration (
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ACPI_PCI_ID *PciId,
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UINT32 Register,
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void *Value,
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UINT32 Width)
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{
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u_int32_t byte_width = Width / 8;
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u_int32_t val;
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if (!pci_cfgregopen())
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return(AE_NOT_EXIST);
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val = pci_cfgregread(PciId->Bus, PciId->Device, PciId->Function, Register, byte_width);
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switch (Width) {
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case 8:
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*(u_int8_t *)Value = val & 0xff;
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break;
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case 16:
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*(u_int16_t *)Value = val & 0xffff;
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break;
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case 32:
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*(u_int32_t *)Value = val;
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break;
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default:
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/* debug trap goes here */
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}
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return(AE_OK);
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}
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ACPI_STATUS
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AcpiOsWritePciConfiguration (
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ACPI_PCI_ID *PciId,
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UINT32 Register,
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ACPI_INTEGER Value,
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UINT32 Width)
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{
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u_int32_t byte_width = Width / 8;
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if (!pci_cfgregopen())
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return(AE_NOT_EXIST);
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pci_cfgregwrite(PciId->Bus, PciId->Device, PciId->Function, Register, Value, byte_width);
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return(AE_OK);
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}
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