Ruslan Bukin c214a270f5 Allow setting access-width for UART registers. ... This is required for FDT's standard "reg-io-width" property (similar to "reg-shift" property) found in many DTS files. This fixes operation on Altera Arria 10 SOC Development Kit, where standard ns8250 uart allows 4-byte access only. Reviewed by: kan, marcel Sponsored by: DARPA, AFRL Differential Revision: https://reviews.freebsd.org/D9785		2017-02-27 20:08:42 +00:00
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apb.c	sys: Replace zero with NULL for pointers.	2017-02-22 02:35:59 +00:00
apbvar.h
ar5312_chip.c
ar5312_chip.h
ar5312reg.h
ar5315_chip.c
ar5315_chip.h
ar5315_cpudef.h
ar5315_gpio.c
ar5315_gpiovar.h
ar5315_machdep.c
ar5315_setup.c
ar5315_setup.h
ar5315_spi.c	ofw_spi: Parse property for the SPI mode and CS polarity.	2016-12-18 14:54:20 +00:00
ar5315_wdog.c
ar5315reg.h
arspireg.h
files.ar5315	Move intrng includes to the main MIPS includes file.	2016-11-19 17:01:06 +00:00
if_are.c
if_arereg.h
uart_bus_ar5315.c	Allow setting access-width for UART registers.	2017-02-27 20:08:42 +00:00
uart_cpu_ar5315.c