4b7ec27007
one. Interestingly, these are actually the default for quite some time (bus_generic_driver_added(9) since r52045 and bus_generic_print_child(9) since r52045) but even recently added device drivers do this unnecessarily. Discussed with: jhb, marcel - While at it, use DEVMETHOD_END. Discussed with: jhb - Also while at it, use __FBSDID.
432 lines
12 KiB
C
432 lines
12 KiB
C
/*-
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* Copyright (c) 2007 Bruce M. Simpson.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* Child driver for PCI host bridge core.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/rman.h>
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#include <sys/malloc.h>
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#include <sys/endian.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <vm/vm_extern.h>
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#include <machine/bus.h>
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#include <machine/cpu.h>
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#include <machine/pcb.h>
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#include <machine/pmap.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcib_private.h>
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#include "pcib_if.h"
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#include <dev/siba/siba_ids.h>
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#include <dev/siba/sibareg.h>
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#include <dev/siba/sibavar.h>
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#include <dev/siba/siba_pcibvar.h>
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#ifndef MIPS_MEM_RID
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#define MIPS_MEM_RID 0x20
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#endif
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#define SBPCI_SLOTMAX 15
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#define SBPCI_READ_4(sc, reg) \
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bus_space_write_4((sc)->sc_bt, (sc)->sc_bh, (reg))
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#define SBPCI_WRITE_4(sc, reg, val) \
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bus_space_write_4((sc)->sc_bt, (sc)->sc_bh, (reg), (val))
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/*
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* PCI Configuration space window (64MB).
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* contained in SBTOPCI1 window.
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*/
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#define SBPCI_CFGBASE 0x0C000000
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#define SBPCI_CFGSIZE 0x01000000
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/*
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* TODO: implement type 1 config space access (ie beyond bus 0)
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* we may need to tweak the windows to do this
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* TODO: interrupt routing.
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* TODO: fully implement bus allocation.
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* TODO: implement resource managers.
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* TODO: code cleanup.
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*/
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static int siba_pcib_activate_resource(device_t, device_t, int,
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int, struct resource *);
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static struct resource *
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siba_pcib_alloc_resource(device_t, device_t, int, int *,
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u_long , u_long, u_long, u_int);
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static int siba_pcib_attach(device_t);
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static int siba_pcib_deactivate_resource(device_t, device_t, int,
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int, struct resource *);
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static int siba_pcib_maxslots(device_t);
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static int siba_pcib_probe(device_t);
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static u_int32_t
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siba_pcib_read_config(device_t, u_int, u_int, u_int, u_int,
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int);
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static int siba_pcib_read_ivar(device_t, device_t, int, uintptr_t *);
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static int siba_pcib_release_resource(device_t, device_t, int, int,
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struct resource *);
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static int siba_pcib_route_interrupt(device_t, device_t, int);
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static int siba_pcib_setup_intr(device_t, device_t, struct resource *,
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int, driver_filter_t *, driver_intr_t *, void *, void **);
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static int siba_pcib_teardown_intr(device_t, device_t, struct resource *,
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void *);
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static void siba_pcib_write_config(device_t, u_int, u_int, u_int, u_int,
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u_int32_t, int);
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static int siba_pcib_write_ivar(device_t, device_t, int, uintptr_t);
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static int
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siba_pcib_probe(device_t dev)
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{
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/* TODO: support earlier cores. */
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/* TODO: Check if PCI host mode is enabled in the SPROM. */
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if (siba_get_vendor(dev) == SIBA_VID_BROADCOM &&
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siba_get_device(dev) == SIBA_DEVID_PCI) {
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device_set_desc(dev, "SiBa-to-PCI host bridge");
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return (BUS_PROBE_DEFAULT);
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}
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return (ENXIO);
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}
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//extern int rman_debug;
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static int
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siba_pcib_attach(device_t dev)
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{
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struct siba_pcib_softc *sc = device_get_softc(dev);
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int rid;
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/*
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* Allocate the resources which the parent bus has already
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* determined for us.
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*/
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rid = MIPS_MEM_RID; /* XXX */
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//rman_debug = 1;
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sc->sc_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
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RF_ACTIVE);
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if (sc->sc_mem == NULL) {
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device_printf(dev, "unable to allocate memory\n");
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return (ENXIO);
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}
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sc->sc_bt = rman_get_bustag(sc->sc_mem);
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sc->sc_bh = rman_get_bushandle(sc->sc_mem);
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device_printf(dev, "bridge registers addr 0x%08x vaddr %p\n",
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(uint32_t)sc->sc_bh, rman_get_virtual(sc->sc_mem));
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SBPCI_WRITE_4(sc, 0x0000, 0x05);
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SBPCI_WRITE_4(sc, 0x0000, 0x0D);
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DELAY(150);
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SBPCI_WRITE_4(sc, 0x0000, 0x0F);
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SBPCI_WRITE_4(sc, 0x0010, 0x01);
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DELAY(1);
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bus_space_handle_t sc_cfg_hand;
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int error;
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/*
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* XXX this doesn't actually do anything on mips; however... should
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* we not be mapping to KSEG1? we need to wire down the range.
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*/
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error = bus_space_map(sc->sc_bt, SBPCI_CFGBASE, SBPCI_CFGSIZE,
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0, &sc_cfg_hand);
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if (error) {
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device_printf(dev, "cannot map PCI configuration space\n");
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return (ENXIO);
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}
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device_printf(dev, "mapped pci config space at 0x%08x\n",
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(uint32_t)sc_cfg_hand);
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/*
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* Setup configuration, io, and dma space windows.
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* XXX we need to be able to do type 1 too.
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* we probably don't need to be able to do i/o cycles.
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*/
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/* I/O read/write window */
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SBPCI_WRITE_4(sc, SIBA_PCICORE_SBTOPCI0, 1);
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/* type 0 configuration only */
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SBPCI_WRITE_4(sc, SIBA_PCICORE_SBTOPCI1, 2);
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SBPCI_WRITE_4(sc, SIBA_PCICORE_SBTOPCI2, 1 << 30); /* memory only */
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DELAY(500);
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/* XXX resource managers */
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device_add_child(dev, "pci", -1);
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return (bus_generic_attach(dev));
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}
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/* bus functions */
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static int
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siba_pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
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{
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struct siba_pcib_softc *sc;
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sc = device_get_softc(dev);
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switch (which) {
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case PCIB_IVAR_BUS:
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*result = sc->sc_bus;
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return (0);
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}
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return (ENOENT);
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}
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static int
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siba_pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
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{
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struct siba_pcib_softc *sc;
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sc = device_get_softc(dev);
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switch (which) {
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case PCIB_IVAR_BUS:
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sc->sc_bus = value;
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return (0);
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}
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return (ENOENT);
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}
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static int
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siba_pcib_setup_intr(device_t dev, device_t child, struct resource *ires,
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int flags, driver_filter_t *filt, driver_intr_t *intr, void *arg,
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void **cookiep)
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{
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return (BUS_SETUP_INTR(device_get_parent(dev), child, ires, flags,
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filt, intr, arg, cookiep));
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}
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static int
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siba_pcib_teardown_intr(device_t dev, device_t child, struct resource *vec,
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void *cookie)
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{
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return (BUS_TEARDOWN_INTR(device_get_parent(dev), child, vec, cookie));
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}
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static struct resource *
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siba_pcib_alloc_resource(device_t bus, device_t child, int type, int *rid,
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u_long start, u_long end, u_long count, u_int flags)
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{
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#if 1
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//device_printf(bus, "%s: not yet implemented\n", __func__);
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return (NULL);
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#else
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bus_space_tag_t tag;
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struct siba_pcib_softc *sc = device_get_softc(bus);
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struct rman *rmanp;
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struct resource *rv;
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tag = 0;
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rv = NULL;
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switch (type) {
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case SYS_RES_IRQ:
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rmanp = &sc->sc_irq_rman;
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break;
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case SYS_RES_MEMORY:
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rmanp = &sc->sc_mem_rman;
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tag = &sc->sc_pci_memt;
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break;
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default:
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return (rv);
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}
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rv = rman_reserve_resource(rmanp, start, end, count, flags, child);
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if (rv != NULL) {
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rman_set_rid(rv, *rid);
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if (type == SYS_RES_MEMORY) {
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#if 0
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rman_set_bustag(rv, tag);
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rman_set_bushandle(rv, rman_get_bushandle(sc->sc_mem) +
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(rman_get_start(rv) - IXP425_PCI_MEM_HWBASE));
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#endif
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}
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}
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return (rv);
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#endif
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}
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static int
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siba_pcib_activate_resource(device_t bus, device_t child, int type, int rid,
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struct resource *r)
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{
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device_printf(bus, "%s: not yet implemented\n", __func__);
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device_printf(bus, "%s called activate_resource\n",
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device_get_nameunit(child));
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return (ENXIO);
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}
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static int
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siba_pcib_deactivate_resource(device_t bus, device_t child, int type, int rid,
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struct resource *r)
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{
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device_printf(bus, "%s: not yet implemented\n", __func__);
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device_printf(bus, "%s called deactivate_resource\n",
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device_get_nameunit(child));
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return (ENXIO);
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}
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static int
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siba_pcib_release_resource(device_t bus, device_t child, int type, int rid,
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struct resource *r)
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{
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device_printf(bus, "%s: not yet implemented\n", __func__);
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device_printf(bus, "%s called release_resource\n",
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device_get_nameunit(child));
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return (ENXIO);
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}
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/* pcib interface functions */
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static int
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siba_pcib_maxslots(device_t dev)
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{
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return (SBPCI_SLOTMAX);
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}
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/*
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* This needs hacking and fixery. It is currently broke and hangs.
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* Debugging it will be tricky; there seems to be no way to enable
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* a target abort which would cause a nice target abort.
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* Look at linux again?
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*/
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static u_int32_t
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siba_pcib_read_config(device_t dev, u_int bus, u_int slot, u_int func,
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u_int reg, int bytes)
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{
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struct siba_pcib_softc *sc = device_get_softc(dev);
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bus_addr_t cfgaddr;
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uint32_t cfgtag;
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uint32_t val;
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/* XXX anything higher than slot 2 currently seems to hang the bus.
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* not sure why this is; look at linux again
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*/
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if (bus != 0 || slot > 2) {
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printf("%s: bad b/s/f %d/%d/%d\n", __func__, bus, slot, func);
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return 0xffffffff; // XXX
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}
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device_printf(dev, "requested %d bytes from b/s/f %d/%d/%d reg %d\n",
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bytes, bus, slot, func, reg);
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/*
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* The configuration tag on the broadcom is weird.
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*/
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SBPCI_WRITE_4(sc, SIBA_PCICORE_SBTOPCI1, 2); /* XXX again??? */
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cfgtag = ((1 << slot) << 16) | (func << 8);
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cfgaddr = SBPCI_CFGBASE | cfgtag | (reg & ~3);
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/* cfg space i/o is always 32 bits on this bridge */
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printf("reading 4 bytes from %08x\n", cfgaddr);
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val = *(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(cfgaddr); /* XXX MIPS */
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val = bswap32(val); /* XXX seems to be needed for now */
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/* swizzle and return what was asked for */
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val &= 0xffffffff >> ((4 - bytes) * 8);
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return (val);
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}
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static void
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siba_pcib_write_config(device_t dev, u_int bus, u_int slot,
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u_int func, u_int reg, u_int32_t val, int bytes)
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{
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/* write to pci configuration space */
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//device_printf(dev, "%s: not yet implemented\n", __func__);
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}
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static int
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siba_pcib_route_interrupt(device_t bridge, device_t device, int pin)
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{
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//device_printf(bridge, "%s: not yet implemented\n", __func__);
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return (-1);
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}
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static device_method_t siba_pcib_methods[] = {
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/* Device interface */
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DEVMETHOD(device_attach, siba_pcib_attach),
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DEVMETHOD(device_probe, siba_pcib_probe),
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/* Bus interface */
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DEVMETHOD(bus_read_ivar, siba_pcib_read_ivar),
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DEVMETHOD(bus_write_ivar, siba_pcib_write_ivar),
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DEVMETHOD(bus_setup_intr, siba_pcib_setup_intr),
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DEVMETHOD(bus_teardown_intr, siba_pcib_teardown_intr),
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DEVMETHOD(bus_alloc_resource, siba_pcib_alloc_resource),
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DEVMETHOD(bus_activate_resource, siba_pcib_activate_resource),
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DEVMETHOD(bus_deactivate_resource, siba_pcib_deactivate_resource),
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DEVMETHOD(bus_release_resource, siba_pcib_release_resource),
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/* pcib interface */
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DEVMETHOD(pcib_maxslots, siba_pcib_maxslots),
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DEVMETHOD(pcib_read_config, siba_pcib_read_config),
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DEVMETHOD(pcib_write_config, siba_pcib_write_config),
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DEVMETHOD(pcib_route_interrupt, siba_pcib_route_interrupt),
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DEVMETHOD_END
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};
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static driver_t siba_pcib_driver = {
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"pcib",
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siba_pcib_methods,
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sizeof(struct siba_softc),
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};
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static devclass_t siba_pcib_devclass;
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DRIVER_MODULE(siba_pcib, siba, siba_pcib_driver, siba_pcib_devclass, 0, 0);
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