7a8d25c037
Requirements) systems from the projects/pseries branch. This in principle includes all IBM POWER hardware released in the last 15 years with the exception of POWER3-based systems when run in 64-bit mode. The main development target, however, has been the PAPR logical partition support that is the default target in KVM on POWER and QEMU -- mileage may vary on actual hardware at present. Much of the heavy lifting here was done by Andreas Tobler. Approved by: re (kib)
324 lines
7.7 KiB
C
324 lines
7.7 KiB
C
/*-
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* Copyright 2011 Nathan Whitehorn
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/smp.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <machine/bus.h>
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#include <machine/intr_machdep.h>
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#include <machine/md_var.h>
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#include <machine/rtas.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include "phyp-hvcall.h"
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#include "pic_if.h"
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#define XICP_PRIORITY 5 /* Random non-zero number */
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#define XICP_IPI 2
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#define MAX_XICP_IRQS (1<<24) /* 24-bit XIRR field */
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static int xicp_probe(device_t);
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static int xicp_attach(device_t);
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static int xics_probe(device_t);
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static int xics_attach(device_t);
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static void xicp_bind(device_t dev, u_int irq, cpuset_t cpumask);
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static void xicp_dispatch(device_t, struct trapframe *);
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static void xicp_enable(device_t, u_int, u_int);
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static void xicp_eoi(device_t, u_int);
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static void xicp_ipi(device_t, u_int);
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static void xicp_mask(device_t, u_int);
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static void xicp_unmask(device_t, u_int);
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static device_method_t xicp_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, xicp_probe),
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DEVMETHOD(device_attach, xicp_attach),
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/* PIC interface */
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DEVMETHOD(pic_bind, xicp_bind),
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DEVMETHOD(pic_dispatch, xicp_dispatch),
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DEVMETHOD(pic_enable, xicp_enable),
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DEVMETHOD(pic_eoi, xicp_eoi),
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DEVMETHOD(pic_ipi, xicp_ipi),
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DEVMETHOD(pic_mask, xicp_mask),
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DEVMETHOD(pic_unmask, xicp_unmask),
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{ 0, 0 },
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};
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static device_method_t xics_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, xics_probe),
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DEVMETHOD(device_attach, xics_attach),
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{ 0, 0 },
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};
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struct xicp_softc {
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struct mtx sc_mtx;
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int ibm_int_on;
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int ibm_int_off;
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int ibm_get_xive;
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int ibm_set_xive;
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/* XXX: inefficient -- hash table? tree? */
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struct {
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int irq;
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int vector;
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} intvecs[256];
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int nintvecs;
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};
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static driver_t xicp_driver = {
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"xicp",
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xicp_methods,
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sizeof(struct xicp_softc)
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};
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static driver_t xics_driver = {
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"xics",
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xics_methods,
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0
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};
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static devclass_t xicp_devclass;
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static devclass_t xics_devclass;
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EARLY_DRIVER_MODULE(xicp, nexus, xicp_driver, xicp_devclass, 0, 0,
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BUS_PASS_INTERRUPT-1);
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EARLY_DRIVER_MODULE(xics, nexus, xics_driver, xics_devclass, 0, 0,
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BUS_PASS_INTERRUPT);
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static int
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xicp_probe(device_t dev)
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{
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if (ofw_bus_get_name(dev) == NULL || strcmp(ofw_bus_get_name(dev),
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"interrupt-controller") != 0)
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return (ENXIO);
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if (!ofw_bus_is_compatible(dev, "ibm,ppc-xicp"))
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return (ENXIO);
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device_set_desc(dev, "PAPR virtual interrupt controller");
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return (BUS_PROBE_GENERIC);
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}
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static int
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xics_probe(device_t dev)
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{
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if (ofw_bus_get_name(dev) == NULL || strcmp(ofw_bus_get_name(dev),
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"interrupt-controller") != 0)
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return (ENXIO);
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if (!ofw_bus_is_compatible(dev, "ibm,ppc-xics"))
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return (ENXIO);
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device_set_desc(dev, "PAPR virtual interrupt source");
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return (BUS_PROBE_GENERIC);
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}
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static int
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xicp_attach(device_t dev)
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{
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struct xicp_softc *sc = device_get_softc(dev);
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phandle_t phandle = ofw_bus_get_node(dev);
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mtx_init(&sc->sc_mtx, "XICP", NULL, MTX_DEF);
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sc->nintvecs = 0;
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sc->ibm_int_on = rtas_token_lookup("ibm,int-on");
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sc->ibm_int_off = rtas_token_lookup("ibm,int-off");
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sc->ibm_set_xive = rtas_token_lookup("ibm,set-xive");
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sc->ibm_get_xive = rtas_token_lookup("ibm,get-xive");
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if (OF_getproplen(phandle, "ibm,phandle") > 0)
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OF_getprop(phandle, "ibm,phandle", &phandle, sizeof(phandle));
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powerpc_register_pic(dev, phandle, MAX_XICP_IRQS,
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1 /* Number of IPIs */, FALSE);
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root_pic = dev;
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return (0);
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}
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static int
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xics_attach(device_t dev)
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{
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phandle_t phandle = ofw_bus_get_node(dev);
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if (OF_getproplen(phandle, "ibm,phandle") > 0)
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OF_getprop(phandle, "ibm,phandle", &phandle, sizeof(phandle));
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/* The XICP (root PIC) will handle all our interrupts */
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powerpc_register_pic(root_pic, phandle, MAX_XICP_IRQS,
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1 /* Number of IPIs */, FALSE);
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return (0);
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}
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/*
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* PIC I/F methods.
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*/
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static void
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xicp_bind(device_t dev, u_int irq, cpuset_t cpumask)
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{
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struct xicp_softc *sc = device_get_softc(dev);
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cell_t status, cpu;
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/*
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* This doesn't appear to actually support affinity groups, so just
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* use the first CPU.
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*/
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CPU_FOREACH(cpu)
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if (CPU_ISSET(cpu, &cpumask)) break;
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rtas_call_method(sc->ibm_set_xive, 3, 1, irq, cpu, XICP_PRIORITY,
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&status);
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}
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static void
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xicp_dispatch(device_t dev, struct trapframe *tf)
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{
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struct xicp_softc *sc;
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uint64_t xirr, junk;
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int i;
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sc = device_get_softc(dev);
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for (;;) {
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/* Return value in R4, use the PFT call */
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phyp_pft_hcall(H_XIRR, 0, 0, 0, 0, &xirr, &junk, &junk);
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xirr &= 0x00ffffff;
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if (xirr == 0) { /* No more pending interrupts? */
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phyp_hcall(H_CPPR, (uint64_t)0xff);
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break;
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}
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if (xirr == XICP_IPI) { /* Magic number for IPIs */
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xirr = MAX_XICP_IRQS; /* Map to FreeBSD magic */
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phyp_hcall(H_IPI, (uint64_t)(PCPU_GET(cpuid)),
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0xff); /* Clear IPI */
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}
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/* XXX: super inefficient */
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for (i = 0; i < sc->nintvecs; i++) {
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if (sc->intvecs[i].irq == xirr)
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break;
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}
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KASSERT(i < sc->nintvecs, ("Unmapped XIRR"));
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powerpc_dispatch_intr(sc->intvecs[i].vector, tf);
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}
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}
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static void
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xicp_enable(device_t dev, u_int irq, u_int vector)
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{
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struct xicp_softc *sc;
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cell_t status, cpu;
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sc = device_get_softc(dev);
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KASSERT(sc->nintvecs + 1 < sizeof(sc->intvecs)/sizeof(sc->intvecs[0]),
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("Too many XICP interrupts"));
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mtx_lock(&sc->sc_mtx);
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sc->intvecs[sc->nintvecs].irq = irq;
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sc->intvecs[sc->nintvecs].vector = vector;
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mb();
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sc->nintvecs++;
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mtx_unlock(&sc->sc_mtx);
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/* IPIs are also enabled */
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if (irq == MAX_XICP_IRQS)
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return;
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/* Bind to this CPU to start: distrib. ID is last entry in gserver# */
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cpu = PCPU_GET(cpuid);
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rtas_call_method(sc->ibm_set_xive, 3, 1, irq, cpu, XICP_PRIORITY,
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&status);
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xicp_unmask(dev, irq);
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}
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static void
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xicp_eoi(device_t dev, u_int irq)
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{
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uint64_t xirr;
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if (irq == MAX_XICP_IRQS) /* Remap IPI interrupt to internal value */
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irq = XICP_IPI;
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xirr = irq | (XICP_PRIORITY << 24);
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phyp_hcall(H_EOI, xirr);
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}
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static void
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xicp_ipi(device_t dev, u_int cpu)
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{
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phyp_hcall(H_IPI, (uint64_t)cpu, XICP_PRIORITY);
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}
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static void
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xicp_mask(device_t dev, u_int irq)
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{
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struct xicp_softc *sc = device_get_softc(dev);
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cell_t status;
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if (irq == MAX_XICP_IRQS)
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return;
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rtas_call_method(sc->ibm_int_off, 1, 1, irq, &status);
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}
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static void
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xicp_unmask(device_t dev, u_int irq)
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{
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struct xicp_softc *sc = device_get_softc(dev);
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cell_t status;
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if (irq == MAX_XICP_IRQS)
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return;
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rtas_call_method(sc->ibm_int_on, 1, 1, irq, &status);
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}
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