55d3ea1731
PCIe Alternate RID Interpretation (ARI) is an optional feature that allows devices to have up to 256 different functions. It is implemented by always setting the PCI slot number to 0 and re-purposing the 5 bits used to encode the slot number to instead contain the function number. Combined with the original 3 bits allocated for the function number, this allows for 256 functions. This is enabled by default, but it's expected to be a no-op on currently supported hardware. It's a prerequisite for supporting PCI SR-IOV, and I want the ARI support to go in early to help shake out any bugs in it. ARI can be disabled by setting the tunable hw.pci.enable_ari=0. Reviewed by: kib MFC after: 2 months Sponsored by: Sandvine Inc.
185 lines
4.5 KiB
Objective-C
185 lines
4.5 KiB
Objective-C
#-
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# Copyright (c) 2000 Doug Rabson
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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# 1. Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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# 2. Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution.
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#
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# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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# ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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# SUCH DAMAGE.
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#
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# $FreeBSD$
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#
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#include <sys/bus.h>
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#include <sys/rman.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcib_private.h>
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INTERFACE pcib;
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CODE {
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static int
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null_route_interrupt(device_t pcib, device_t dev, int pin)
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{
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return (PCI_INVALID_IRQ);
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}
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};
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#
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# Return the number of slots on the attached PCI bus.
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#
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METHOD int maxslots {
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device_t dev;
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};
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#
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#
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# Return the number of functions on the attached PCI bus.
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#
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METHOD int maxfuncs {
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device_t dev;
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} DEFAULT pcib_maxfuncs;
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#
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# Read configuration space on the PCI bus. The bus, slot and func
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# arguments determine the device which is being read and the reg
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# argument is a byte offset into configuration space for that
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# device. The width argument (which should be 1, 2 or 4) specifies how
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# many byte of configuration space to read from that offset.
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#
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METHOD u_int32_t read_config {
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device_t dev;
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u_int bus;
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u_int slot;
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u_int func;
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u_int reg;
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int width;
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};
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#
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# Write configuration space on the PCI bus. The bus, slot and func
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# arguments determine the device which is being written and the reg
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# argument is a byte offset into configuration space for that
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# device. The value field is written to the configuration space, with
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# the number of bytes written depending on the width argument.
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#
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METHOD void write_config {
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device_t dev;
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u_int bus;
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u_int slot;
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u_int func;
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u_int reg;
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u_int32_t value;
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int width;
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};
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#
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# Route an interrupt. Returns a value suitable for stuffing into
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# a device's interrupt register.
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#
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METHOD int route_interrupt {
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device_t pcib;
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device_t dev;
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int pin;
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} DEFAULT null_route_interrupt;
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#
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# Allocate 'count' MSI messsages mapped onto 'count' IRQs. 'irq' points
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# to an array of at least 'count' ints. The max number of messages this
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# device supports is included so that the MD code can take that into
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# account when assigning resources so that the proper number of low bits
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# are clear in the resulting message data value.
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#
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METHOD int alloc_msi {
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device_t pcib;
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device_t dev;
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int count;
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int maxcount;
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int *irqs;
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};
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#
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# Release 'count' MSI messages mapped onto 'count' IRQs stored in the
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# array pointed to by 'irqs'.
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#
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METHOD int release_msi {
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device_t pcib;
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device_t dev;
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int count;
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int *irqs;
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};
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#
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# Allocate a single MSI-X message mapped onto '*irq'.
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#
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METHOD int alloc_msix {
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device_t pcib;
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device_t dev;
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int *irq;
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};
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#
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# Release a single MSI-X message mapped onto 'irq'.
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#
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METHOD int release_msix {
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device_t pcib;
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device_t dev;
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int irq;
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};
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#
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# Determine the MSI/MSI-X message address and data for 'irq'. The address
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# is returned in '*addr', and the data in '*data'.
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#
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METHOD int map_msi {
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device_t pcib;
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device_t dev;
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int irq;
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uint64_t *addr;
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uint32_t *data;
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};
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#
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# Return the device power state to be used during a system sleep state
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# transition such as suspend and resume.
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#
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METHOD int power_for_sleep {
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device_t pcib;
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device_t dev;
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int *pstate;
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};
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#
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# Return the PCI Routing Identifier (RID) for the device.
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#
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METHOD uint16_t get_rid {
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device_t pcib;
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device_t dev;
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} DEFAULT pcib_get_rid;
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#
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# Enable Alternative RID Interpretation if both the downstream port (pcib)
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# and the endpoint device (dev) both support it.
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#
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METHOD int try_enable_ari {
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device_t pcib;
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device_t dev;
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};
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