Sean Bruno 3f929d8cdd Update hwpmc to support the Xeon class of Ivybridge processors.
case 0x3E:      /* Per Intel document 325462-045US 01/2013. */

Add manpage to document all the goodness that is available in this
processor model.

No support for uncore events at this time.

Submitted by:	hiren panchasara <hiren.panchasara@gmail.com>
Reviewed by:	davide, jimharris, sbruno
Obtained from:	Yahoo! Inc.
MFC after:	2 weeks
2013-01-31 22:09:53 +00:00
..
2013-01-01 18:29:25 +00:00
2013-01-12 09:08:37 +00:00
2012-11-16 12:31:43 +00:00
2012-06-02 08:47:26 +00:00
2012-04-18 07:02:53 +00:00
2012-10-05 18:42:50 +00:00
2013-01-29 21:37:56 +00:00
2012-10-18 15:39:29 +00:00
2012-02-25 14:31:25 +00:00
2012-06-21 21:47:08 +00:00
2013-01-04 19:28:32 +00:00