6b7ba54456
The PQ3 is a high performance integrated communications processing system based on the e500 core, which is an embedded RISC processor that implements the 32-bit Book E definition of the PowerPC architecture. For details refer to: http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MPC8555E This port was tested and successfully run on the following members of the PQ3 family: MPC8533, MPC8541, MPC8548, MPC8555. The following major integrated peripherals are supported: * On-chip peripherals bus * OpenPIC interrupt controller * UART * Ethernet (TSEC) * Host/PCI bridge * QUICC engine (SCC functionality) This commit brings the main functionality and will be followed by individual drivers that are logically separate from this base. Approved by: cognet (mentor) Obtained from: Juniper, Semihalf MFp4: e500
277 lines
6.3 KiB
C
277 lines
6.3 KiB
C
/*-
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* Copyright (C) 1995, 1996 Wolfgang Solfrank.
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* Copyright (C) 1995, 1996 TooLs GmbH.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by TooLs GmbH.
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* 4. The name of TooLs GmbH may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $NetBSD: clock.c,v 1.9 2000/01/19 02:52:19 msaitoh Exp $
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*/
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/*
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* Copyright (C) 2001 Benno Rice.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/sysctl.h>
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#include <sys/bus.h>
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#include <sys/clock.h>
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#include <sys/timetc.h>
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#include <sys/interrupt.h>
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#include <machine/clock.h>
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#include <machine/psl.h>
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#include <machine/spr.h>
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#include <machine/cpu.h>
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#include <machine/intr.h>
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#include <machine/md_var.h>
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/*
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* Initially we assume a processor with a bus frequency of 12.5 MHz.
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*/
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u_int tickspending;
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u_long ns_per_tick = 80;
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static u_long ticks_per_sec = 12500000;
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static long ticks_per_intr;
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#define DIFF19041970 2082844800
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static int clockinitted = 0;
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static timecounter_get_t decr_get_timecount;
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static struct timecounter decr_timecounter = {
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decr_get_timecount, /* get_timecount */
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0, /* no poll_pps */
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~0u, /* counter_mask */
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0, /* frequency */
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"decrementer" /* name */
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};
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void
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inittodr(time_t base)
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{
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time_t deltat;
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u_int rtc_time;
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struct timespec ts;
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/*
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* If we have an RTC device use it, otherwise use the fs time.
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*/
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{
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ts.tv_sec = base;
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ts.tv_nsec = 0;
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tc_setclock(&ts);
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return;
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}
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clockinitted = 1;
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ts.tv_sec = rtc_time - DIFF19041970;
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deltat = ts.tv_sec - base;
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if (deltat < 0) {
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deltat = -deltat;
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}
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if (deltat < 2 * SECDAY) {
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tc_setclock(&ts);
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return;
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}
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printf("WARNING: clock %s %d days",
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ts.tv_sec < base ? "lost" : "gained", (int)(deltat / SECDAY));
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printf(" -- CHECK AND RESET THE DATE!\n");
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}
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/*
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* Similar to the above
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*/
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void
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resettodr()
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{
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}
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void
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decr_intr(struct trapframe *frame)
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{
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u_long msr;
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/*
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* Check whether we are initialized.
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*/
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if (!ticks_per_intr)
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return;
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/*
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* Interrupt handler must reset DIS to avoid getting another
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* interrupt once EE is enabled.
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*/
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mtspr(SPR_TSR, TSR_DIS);
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/*
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* Reenable interrupts
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*/
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msr = mfmsr();
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mtmsr(msr | PSL_EE);
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hardclock(TRAPF_USERMODE(frame), TRAPF_PC(frame));
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}
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void
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cpu_initclocks(void)
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{
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return;
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}
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void
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decr_config (unsigned long freq)
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{
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ticks_per_sec = freq;
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decr_timecounter.tc_frequency = freq;
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}
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void
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decr_init (void)
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{
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unsigned int msr;
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/*
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* Should check for correct CPU here? XXX
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*/
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msr = mfmsr();
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mtmsr(msr & ~(PSL_EE));
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tc_init(&decr_timecounter);
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ns_per_tick = 1000000000 / ticks_per_sec;
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ticks_per_intr = ticks_per_sec / hz;
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mtdec(ticks_per_intr);
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mtspr(SPR_DECAR, ticks_per_intr);
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mtspr(SPR_TCR, mfspr(SPR_TCR) | TCR_DIE | TCR_ARE);
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mtmsr(msr);
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}
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static __inline u_quad_t
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mftb (void)
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{
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u_long scratch;
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u_quad_t tb;
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__asm__ __volatile__(
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"1: mftbu %0;"
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" mftb %0+1;"
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" mftbu %1;"
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" cmpw 0,%0,%1;"
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" bne 1b"
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: "=r"(tb), "=r"(scratch));
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return tb;
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}
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static unsigned
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decr_get_timecount(struct timecounter *tc)
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{
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quad_t tb;
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tb = mftb();
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return tb;
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}
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/*
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* Wait for about n microseconds (at least!).
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*/
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void
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DELAY(int n)
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{
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u_quad_t start, end, now;
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#define USECS_IN_SEC 1000000ULL
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if (n > USECS_IN_SEC) {
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printf("WARNING: %s(%d) called from %p", __func__, n,
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__builtin_return_address(0));
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}
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start = mftb();
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end = start + (u_quad_t)ticks_per_sec / ( USECS_IN_SEC / n);
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do {
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now = mftb();
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} while (now < end || (now > start && end < start));
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}
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/*
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* Nothing to do.
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*/
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void
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cpu_startprofclock(void)
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{
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/* Do nothing */
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}
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void
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cpu_stopprofclock(void)
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{
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}
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/*
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* XXX Needed by syscons
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*/
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int
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sysbeep(int pitch, int period)
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{
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return (0);
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}
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