af77cd7584
ethernet MAC node. This fixes operation on Terasic DE10-Pro (Intel Stratix 10 GX/SX FPGA Development Kit). Sponsored by: DARPA, AFRL
329 lines
9.3 KiB
C
329 lines
9.3 KiB
C
/*-
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* Copyright (c) 2014,2019 Ruslan Bukin <br@bsdpad.com>
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* All rights reserved.
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*
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* This software was developed by SRI International and the University of
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* Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
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* ("CTSRD"), as part of the DARPA CRASH research programme.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* Micrel KSZ8081/KSZ9021/KSZ9031 Gigabit Ethernet Transceiver
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/socket.h>
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#include <sys/errno.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <sys/malloc.h>
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#include <machine/bus.h>
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#include <net/if.h>
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#include <net/if_media.h>
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#include <dev/mii/mii.h>
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#include <dev/mii/miivar.h>
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#include "miidevs.h"
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#include "miibus_if.h"
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#include <dev/fdt/fdt_common.h>
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/mii/mii_fdt.h>
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#define MII_KSZPHY_EXTREG 0x0b
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#define KSZPHY_EXTREG_WRITE (1 << 15)
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#define MII_KSZPHY_EXTREG_WRITE 0x0c
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#define MII_KSZPHY_EXTREG_READ 0x0d
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#define MII_KSZPHY_CLK_CONTROL_PAD_SKEW 0x104
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#define MII_KSZPHY_RX_DATA_PAD_SKEW 0x105
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#define MII_KSZPHY_TX_DATA_PAD_SKEW 0x106
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/* KSZ9031 */
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#define MII_KSZ9031_MMD_ACCESS_CTRL 0x0d
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#define MII_KSZ9031_MMD_ACCESS_DATA 0x0e
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#define MII_KSZ9031_MMD_DATA_NOINC (1 << 14)
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#define MII_KSZ9031_CONTROL_PAD_SKEW 0x4
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#define MII_KSZ9031_RX_DATA_PAD_SKEW 0x5
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#define MII_KSZ9031_TX_DATA_PAD_SKEW 0x6
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#define MII_KSZ9031_CLOCK_PAD_SKEW 0x8
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#define MII_KSZ8081_PHYCTL2 0x1f
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#define PS_TO_REG(p) ((p) / 200)
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static int micphy_probe(device_t);
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static int micphy_attach(device_t);
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static void micphy_reset(struct mii_softc *);
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static int micphy_service(struct mii_softc *, struct mii_data *, int);
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static device_method_t micphy_methods[] = {
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/* device interface */
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DEVMETHOD(device_probe, micphy_probe),
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DEVMETHOD(device_attach, micphy_attach),
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DEVMETHOD(device_detach, mii_phy_detach),
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DEVMETHOD(device_shutdown, bus_generic_shutdown),
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DEVMETHOD_END
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};
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static devclass_t micphy_devclass;
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static driver_t micphy_driver = {
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"micphy",
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micphy_methods,
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sizeof(struct mii_softc)
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};
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DRIVER_MODULE(micphy, miibus, micphy_driver, micphy_devclass, 0, 0);
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static const struct mii_phydesc micphys[] = {
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MII_PHY_DESC(MICREL, KSZ8081),
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MII_PHY_DESC(MICREL, KSZ9021),
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MII_PHY_DESC(MICREL, KSZ9031),
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MII_PHY_END
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};
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static const struct mii_phy_funcs micphy_funcs = {
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micphy_service,
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ukphy_status,
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micphy_reset
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};
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static uint32_t
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ksz9031_read(struct mii_softc *sc, uint32_t devaddr, uint32_t reg)
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{
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/* Set up device address and register. */
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PHY_WRITE(sc, MII_KSZ9031_MMD_ACCESS_CTRL, devaddr);
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PHY_WRITE(sc, MII_KSZ9031_MMD_ACCESS_DATA, reg);
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/* Select register data for MMD and read the value. */
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PHY_WRITE(sc, MII_KSZ9031_MMD_ACCESS_CTRL,
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MII_KSZ9031_MMD_DATA_NOINC | devaddr);
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return (PHY_READ(sc, MII_KSZ9031_MMD_ACCESS_DATA));
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}
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static void
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ksz9031_write(struct mii_softc *sc, uint32_t devaddr, uint32_t reg,
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uint32_t val)
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{
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/* Set up device address and register. */
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PHY_WRITE(sc, MII_KSZ9031_MMD_ACCESS_CTRL, devaddr);
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PHY_WRITE(sc, MII_KSZ9031_MMD_ACCESS_DATA, reg);
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/* Select register data for MMD and write the value. */
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PHY_WRITE(sc, MII_KSZ9031_MMD_ACCESS_CTRL,
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MII_KSZ9031_MMD_DATA_NOINC | devaddr);
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PHY_WRITE(sc, MII_KSZ9031_MMD_ACCESS_DATA, val);
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}
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static uint32_t
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ksz9021_read(struct mii_softc *sc, uint32_t reg)
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{
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PHY_WRITE(sc, MII_KSZPHY_EXTREG, reg);
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return (PHY_READ(sc, MII_KSZPHY_EXTREG_READ));
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}
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static void
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ksz9021_write(struct mii_softc *sc, uint32_t reg, uint32_t val)
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{
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PHY_WRITE(sc, MII_KSZPHY_EXTREG, KSZPHY_EXTREG_WRITE | reg);
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PHY_WRITE(sc, MII_KSZPHY_EXTREG_WRITE, val);
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}
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static void
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ksz90x1_load_values(struct mii_softc *sc, phandle_t node,
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uint32_t dev, uint32_t reg, char *field1, uint32_t f1mask, int f1off,
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char *field2, uint32_t f2mask, int f2off, char *field3, uint32_t f3mask,
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int f3off, char *field4, uint32_t f4mask, int f4off)
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{
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pcell_t dts_value[1];
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int len;
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int val;
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if (sc->mii_mpd_model == MII_MODEL_MICREL_KSZ9031)
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val = ksz9031_read(sc, dev, reg);
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else
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val = ksz9021_read(sc, reg);
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if ((len = OF_getproplen(node, field1)) > 0) {
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OF_getencprop(node, field1, dts_value, len);
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val &= ~(f1mask << f1off);
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val |= (PS_TO_REG(dts_value[0]) & f1mask) << f1off;
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}
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if (field2 != NULL && (len = OF_getproplen(node, field2)) > 0) {
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OF_getencprop(node, field2, dts_value, len);
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val &= ~(f2mask << f2off);
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val |= (PS_TO_REG(dts_value[0]) & f2mask) << f2off;
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}
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if (field3 != NULL && (len = OF_getproplen(node, field3)) > 0) {
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OF_getencprop(node, field3, dts_value, len);
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val &= ~(f3mask << f3off);
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val |= (PS_TO_REG(dts_value[0]) & f3mask) << f3off;
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}
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if (field4 != NULL && (len = OF_getproplen(node, field4)) > 0) {
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OF_getencprop(node, field4, dts_value, len);
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val &= ~(f4mask << f4off);
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val |= (PS_TO_REG(dts_value[0]) & f4mask) << f4off;
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}
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if (sc->mii_mpd_model == MII_MODEL_MICREL_KSZ9031)
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ksz9031_write(sc, dev, reg, val);
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else
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ksz9021_write(sc, reg, val);
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}
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static void
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ksz9031_load_values(struct mii_softc *sc, phandle_t node)
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{
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ksz90x1_load_values(sc, node, 2, MII_KSZ9031_CONTROL_PAD_SKEW,
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"txen-skew-ps", 0xf, 0, "rxdv-skew-ps", 0xf, 4,
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NULL, 0, 0, NULL, 0, 0);
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ksz90x1_load_values(sc, node, 2, MII_KSZ9031_RX_DATA_PAD_SKEW,
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"rxd0-skew-ps", 0xf, 0, "rxd1-skew-ps", 0xf, 4,
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"rxd2-skew-ps", 0xf, 8, "rxd3-skew-ps", 0xf, 12);
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ksz90x1_load_values(sc, node, 2, MII_KSZ9031_TX_DATA_PAD_SKEW,
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"txd0-skew-ps", 0xf, 0, "txd1-skew-ps", 0xf, 4,
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"txd2-skew-ps", 0xf, 8, "txd3-skew-ps", 0xf, 12);
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ksz90x1_load_values(sc, node, 2, MII_KSZ9031_CLOCK_PAD_SKEW,
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"rxc-skew-ps", 0x1f, 0, "txc-skew-ps", 0x1f, 5,
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NULL, 0, 0, NULL, 0, 0);
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}
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static void
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ksz9021_load_values(struct mii_softc *sc, phandle_t node)
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{
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ksz90x1_load_values(sc, node, 0, MII_KSZPHY_CLK_CONTROL_PAD_SKEW,
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"txen-skew-ps", 0xf, 0, "txc-skew-ps", 0xf, 4,
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"rxdv-skew-ps", 0xf, 8, "rxc-skew-ps", 0xf, 12);
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ksz90x1_load_values(sc, node, 0, MII_KSZPHY_RX_DATA_PAD_SKEW,
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"rxd0-skew-ps", 0xf, 0, "rxd1-skew-ps", 0xf, 4,
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"rxd2-skew-ps", 0xf, 8, "rxd3-skew-ps", 0xf, 12);
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ksz90x1_load_values(sc, node, 0, MII_KSZPHY_TX_DATA_PAD_SKEW,
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"txd0-skew-ps", 0xf, 0, "txd1-skew-ps", 0xf, 4,
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"txd2-skew-ps", 0xf, 8, "txd3-skew-ps", 0xf, 12);
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}
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static int
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micphy_probe(device_t dev)
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{
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return (mii_phy_dev_probe(dev, micphys, BUS_PROBE_DEFAULT));
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}
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static int
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micphy_attach(device_t dev)
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{
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mii_fdt_phy_config_t *cfg;
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struct mii_softc *sc;
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phandle_t node;
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device_t miibus;
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device_t parent;
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sc = device_get_softc(dev);
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mii_phy_dev_attach(dev, MIIF_NOMANPAUSE, &micphy_funcs, 1);
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mii_phy_setmedia(sc);
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/* Nothing further to configure for 8081 model. */
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if (sc->mii_mpd_model == MII_MODEL_MICREL_KSZ8081)
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return (0);
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miibus = device_get_parent(dev);
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parent = device_get_parent(miibus);
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if ((node = ofw_bus_get_node(parent)) == -1)
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return (ENXIO);
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cfg = mii_fdt_get_config(dev);
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if (sc->mii_mpd_model == MII_MODEL_MICREL_KSZ9031)
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ksz9031_load_values(sc, cfg->phynode);
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else
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ksz9021_load_values(sc, cfg->phynode);
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return (0);
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}
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static void
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micphy_reset(struct mii_softc *sc)
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{
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int reg;
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/*
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* The 8081 has no "sticky bits" that survive a soft reset; several bits
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* in the Phy Control Register 2 must be preserved across the reset.
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* These bits are set up by the bootloader; they control how the phy
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* interfaces to the board (such as clock frequency and LED behavior).
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*/
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if (sc->mii_mpd_model == MII_MODEL_MICREL_KSZ8081)
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reg = PHY_READ(sc, MII_KSZ8081_PHYCTL2);
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mii_phy_reset(sc);
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if (sc->mii_mpd_model == MII_MODEL_MICREL_KSZ8081)
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PHY_WRITE(sc, MII_KSZ8081_PHYCTL2, reg);
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}
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static int
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micphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
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{
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switch (cmd) {
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case MII_POLLSTAT:
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break;
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case MII_MEDIACHG:
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mii_phy_setmedia(sc);
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break;
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case MII_TICK:
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if (mii_phy_tick(sc) == EJUSTRETURN)
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return (0);
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break;
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}
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/* Update the media status. */
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PHY_STATUS(sc);
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/* Callback if something changed. */
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mii_phy_update(sc, cmd);
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return (0);
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}
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