ea91ca92ba
- Must-Be-Zero bits cannot be set. - EFER_LME and EFER_LMA should respect the long mode consistency checks. - EFER_NXE, EFER_FFXSR, EFER_TCE can be set if allowed by CPUID capabilities. - Flag an error if guest tries to set EFER_LMSLE since bhyve doesn't enforce segment limits in 64-bit mode. MFC after: 2 weeks
79 lines
2.5 KiB
C
79 lines
2.5 KiB
C
/*-
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* Copyright (c) 2011 NetApp, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _X86_H_
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#define _X86_H_
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#define CPUID_0000_0000 (0x0)
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#define CPUID_0000_0001 (0x1)
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#define CPUID_0000_0002 (0x2)
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#define CPUID_0000_0003 (0x3)
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#define CPUID_0000_0004 (0x4)
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#define CPUID_0000_0006 (0x6)
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#define CPUID_0000_0007 (0x7)
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#define CPUID_0000_000A (0xA)
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#define CPUID_0000_000B (0xB)
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#define CPUID_0000_000D (0xD)
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#define CPUID_8000_0000 (0x80000000)
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#define CPUID_8000_0001 (0x80000001)
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#define CPUID_8000_0002 (0x80000002)
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#define CPUID_8000_0003 (0x80000003)
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#define CPUID_8000_0004 (0x80000004)
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#define CPUID_8000_0006 (0x80000006)
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#define CPUID_8000_0007 (0x80000007)
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#define CPUID_8000_0008 (0x80000008)
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/*
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* CPUID instruction Fn0000_0001:
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*/
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#define CPUID_0000_0001_APICID_MASK (0xff<<24)
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#define CPUID_0000_0001_APICID_SHIFT 24
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/*
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* CPUID instruction Fn0000_0001 ECX
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*/
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#define CPUID_0000_0001_FEAT0_VMX (1<<5)
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int x86_emulate_cpuid(struct vm *vm, int vcpu_id, uint32_t *eax, uint32_t *ebx,
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uint32_t *ecx, uint32_t *edx);
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enum vm_cpuid_capability {
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VCC_NONE,
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VCC_NO_EXECUTE,
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VCC_FFXSR,
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VCC_TCE,
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VCC_LAST
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};
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/*
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* Return 'true' if the capability 'cap' is enabled in this virtual cpu
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* and 'false' otherwise.
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*/
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bool vm_cpuid_capability(struct vm *vm, int vcpuid, enum vm_cpuid_capability);
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#endif
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