4e7f43bab6
a single thermal sensor located in the CPU.
421 lines
9.9 KiB
C
421 lines
9.9 KiB
C
/*-
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* Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/*
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* Allwinner thermal sensor controller
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/rman.h>
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#include <sys/kernel.h>
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#include <sys/sysctl.h>
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#include <sys/reboot.h>
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#include <sys/module.h>
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#include <machine/bus.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/extres/clk/clk.h>
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#include <dev/extres/hwreset/hwreset.h>
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#include <arm/allwinner/aw_sid.h>
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#define THS_CTRL0 0x00
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#define THS_CTRL1 0x04
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#define ADC_CALI_EN (1 << 17)
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#define THS_CTRL2 0x40
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#define SENSOR_ACQ1_SHIFT 16
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#define SENSOR2_EN (1 << 2)
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#define SENSOR1_EN (1 << 1)
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#define SENSOR0_EN (1 << 0)
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#define THS_INTC 0x44
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#define THS_INTS 0x48
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#define THS2_DATA_IRQ_STS (1 << 10)
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#define THS1_DATA_IRQ_STS (1 << 9)
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#define THS0_DATA_IRQ_STS (1 << 8)
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#define SHUT_INT2_STS (1 << 6)
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#define SHUT_INT1_STS (1 << 5)
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#define SHUT_INT0_STS (1 << 4)
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#define ALARM_INT2_STS (1 << 2)
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#define ALARM_INT1_STS (1 << 1)
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#define ALARM_INT0_STS (1 << 0)
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#define THS_FILTER 0x70
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#define THS_CALIB0 0x74
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#define THS_CALIB1 0x78
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#define THS_DATA0 0x80
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#define THS_DATA1 0x84
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#define THS_DATA2 0x88
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#define DATA_MASK 0xfff
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#define A83T_ADC_ACQUIRE_TIME 0x17
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#define A83T_FILTER 0x4
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#define A83T_INTC 0x1000
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#define A83T_TEMP_BASE 2719000
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#define A83T_TEMP_MUL 1000
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#define A83T_TEMP_DIV 14186
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#define A83T_CLK_RATE 24000000
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#define A64_ADC_ACQUIRE_TIME 0x190
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#define A64_FILTER 0x6
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#define A64_INTC 0x18000
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#define A64_TEMP_BASE 2170000
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#define A64_TEMP_MUL 1000
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#define A64_TEMP_DIV 8560
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#define A64_CLK_RATE 4000000
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#define H3_ADC_ACQUIRE_TIME 0x3f
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#define H3_FILTER 0x6
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#define H3_INTC 0x191000
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#define H3_TEMP_BASE 217000000
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#define H3_TEMP_MUL 121168
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#define H3_TEMP_DIV 1000000
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#define H3_CLK_RATE 4000000
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#define TEMP_C_TO_K 273
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#define SENSOR_ENABLE_ALL (SENSOR0_EN|SENSOR1_EN|SENSOR2_EN)
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#define SHUT_INT_ALL (SHUT_INT0_STS|SHUT_INT1_STS|SHUT_INT2_STS)
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#define MAX_SENSORS 3
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struct aw_thermal_sensor {
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const char *name;
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const char *desc;
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};
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struct aw_thermal_config {
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struct aw_thermal_sensor sensors[MAX_SENSORS];
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int nsensors;
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uint64_t clk_rate;
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uint32_t adc_acquire_time;
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uint32_t filter;
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uint32_t intc;
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int temp_base;
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int temp_mul;
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int temp_div;
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int calib;
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};
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static const struct aw_thermal_config a83t_config = {
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.nsensors = 3,
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.sensors = {
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[0] = {
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.name = "cluster0",
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.desc = "CPU cluster 0 temperature",
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},
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[1] = {
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.name = "cluster1",
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.desc = "CPU cluster 1 temperature",
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},
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[2] = {
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.name = "gpu",
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.desc = "GPU temperature",
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},
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},
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.clk_rate = A83T_CLK_RATE,
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.adc_acquire_time = A83T_ADC_ACQUIRE_TIME,
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.filter = A83T_FILTER,
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.intc = A83T_INTC,
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.temp_base = A83T_TEMP_BASE,
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.temp_mul = A83T_TEMP_MUL,
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.temp_div = A83T_TEMP_DIV,
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.calib = 1,
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};
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static const struct aw_thermal_config a64_config = {
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.nsensors = 3,
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.sensors = {
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[0] = {
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.name = "cpu",
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.desc = "CPU temperature",
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},
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[1] = {
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.name = "gpu1",
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.desc = "GPU temperature 1",
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},
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[2] = {
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.name = "gpu2",
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.desc = "GPU temperature 2",
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},
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},
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.clk_rate = A64_CLK_RATE,
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.adc_acquire_time = A64_ADC_ACQUIRE_TIME,
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.filter = A64_FILTER,
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.intc = A64_INTC,
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.temp_base = A64_TEMP_BASE,
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.temp_mul = A64_TEMP_MUL,
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.temp_div = A64_TEMP_DIV,
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};
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static const struct aw_thermal_config h3_config = {
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.nsensors = 1,
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.sensors = {
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[0] = {
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.name = "cpu",
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.desc = "CPU temperature",
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},
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},
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.clk_rate = H3_CLK_RATE,
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.adc_acquire_time = H3_ADC_ACQUIRE_TIME,
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.filter = H3_FILTER,
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.intc = H3_INTC,
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.temp_base = H3_TEMP_BASE,
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.temp_mul = H3_TEMP_MUL,
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.temp_div = H3_TEMP_DIV,
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};
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static struct ofw_compat_data compat_data[] = {
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{ "allwinner,sun8i-a83t-ts", (uintptr_t)&a83t_config },
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{ "allwinner,sun8i-h3-ts", (uintptr_t)&h3_config },
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{ "allwinner,sun50i-a64-ts", (uintptr_t)&a64_config },
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{ NULL, (uintptr_t)NULL }
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};
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#define THS_CONF(d) \
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(void *)ofw_bus_search_compatible((d), compat_data)->ocd_data
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struct aw_thermal_softc {
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struct resource *res[2];
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struct aw_thermal_config *conf;
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};
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static struct resource_spec aw_thermal_spec[] = {
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{ SYS_RES_MEMORY, 0, RF_ACTIVE },
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{ SYS_RES_IRQ, 0, RF_ACTIVE },
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{ -1, 0 }
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};
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#define RD4(sc, reg) bus_read_4((sc)->res[0], (reg))
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#define WR4(sc, reg, val) bus_write_4((sc)->res[0], (reg), (val))
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static int
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aw_thermal_init(struct aw_thermal_softc *sc)
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{
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uint32_t calib0, calib1;
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int error;
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if (sc->conf->calib) {
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/* Read calibration settings from SRAM */
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error = aw_sid_read_tscalib(&calib0, &calib1);
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if (error != 0)
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return (error);
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/* Write calibration settings to thermal controller */
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WR4(sc, THS_CALIB0, calib0);
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WR4(sc, THS_CALIB1, calib1);
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}
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/* Configure ADC acquire time (CLK_IN/(N+1)) and enable sensors */
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WR4(sc, THS_CTRL1, ADC_CALI_EN);
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WR4(sc, THS_CTRL0, sc->conf->adc_acquire_time);
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WR4(sc, THS_CTRL2, sc->conf->adc_acquire_time << SENSOR_ACQ1_SHIFT);
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/* Enable average filter */
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WR4(sc, THS_FILTER, sc->conf->filter);
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/* Enable interrupts */
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WR4(sc, THS_INTS, RD4(sc, THS_INTS));
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WR4(sc, THS_INTC, sc->conf->intc | SHUT_INT_ALL);
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/* Enable sensors */
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WR4(sc, THS_CTRL2, RD4(sc, THS_CTRL2) | SENSOR_ENABLE_ALL);
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return (0);
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}
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static int
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aw_thermal_reg_to_temp(struct aw_thermal_softc *sc, uint32_t val)
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{
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return ((sc->conf->temp_base - (val * sc->conf->temp_mul)) /
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sc->conf->temp_div);
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}
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static int
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aw_thermal_gettemp(struct aw_thermal_softc *sc, int sensor)
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{
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uint32_t val;
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val = RD4(sc, THS_DATA0 + (sensor * 4));
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return (aw_thermal_reg_to_temp(sc, val) + TEMP_C_TO_K);
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}
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static int
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aw_thermal_sysctl(SYSCTL_HANDLER_ARGS)
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{
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struct aw_thermal_softc *sc;
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int sensor, val;
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sc = arg1;
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sensor = arg2;
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val = aw_thermal_gettemp(sc, sensor);
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return sysctl_handle_opaque(oidp, &val, sizeof(val), req);
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}
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static void
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aw_thermal_intr(void *arg)
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{
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struct aw_thermal_softc *sc;
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device_t dev;
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uint32_t ints;
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dev = arg;
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sc = device_get_softc(dev);
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ints = RD4(sc, THS_INTS);
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WR4(sc, THS_INTS, ints);
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if ((ints & SHUT_INT_ALL) != 0) {
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device_printf(dev,
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"WARNING - current temperature exceeds safe limits\n");
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shutdown_nice(RB_POWEROFF);
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}
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}
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static int
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aw_thermal_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (THS_CONF(dev) == NULL)
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return (ENXIO);
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device_set_desc(dev, "Allwinner Thermal Sensor Controller");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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aw_thermal_attach(device_t dev)
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{
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struct aw_thermal_softc *sc;
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clk_t clk_ahb, clk_ths;
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hwreset_t rst;
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int i, error;
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void *ih;
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sc = device_get_softc(dev);
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clk_ahb = clk_ths = NULL;
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rst = NULL;
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ih = NULL;
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sc->conf = THS_CONF(dev);
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if (bus_alloc_resources(dev, aw_thermal_spec, sc->res) != 0) {
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device_printf(dev, "cannot allocate resources for device\n");
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return (ENXIO);
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}
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if (clk_get_by_ofw_name(dev, 0, "ahb", &clk_ahb) == 0) {
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error = clk_enable(clk_ahb);
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if (error != 0) {
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device_printf(dev, "cannot enable ahb clock\n");
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goto fail;
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}
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}
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if (clk_get_by_ofw_name(dev, 0, "ths", &clk_ths) == 0) {
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error = clk_set_freq(clk_ths, sc->conf->clk_rate, 0);
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if (error != 0) {
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device_printf(dev, "cannot set ths clock rate\n");
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goto fail;
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}
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error = clk_enable(clk_ths);
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if (error != 0) {
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device_printf(dev, "cannot enable ths clock\n");
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goto fail;
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}
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}
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if (hwreset_get_by_ofw_idx(dev, 0, 0, &rst) == 0) {
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error = hwreset_deassert(rst);
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if (error != 0) {
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device_printf(dev, "cannot de-assert reset\n");
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goto fail;
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}
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}
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error = bus_setup_intr(dev, sc->res[1], INTR_TYPE_MISC | INTR_MPSAFE,
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NULL, aw_thermal_intr, dev, &ih);
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if (error != 0) {
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device_printf(dev, "cannot setup interrupt handler\n");
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goto fail;
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}
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if (aw_thermal_init(sc) != 0)
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goto fail;
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for (i = 0; i < sc->conf->nsensors; i++)
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SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
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SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
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OID_AUTO, sc->conf->sensors[i].name,
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CTLTYPE_INT | CTLFLAG_RD,
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sc, i, aw_thermal_sysctl, "IK0",
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sc->conf->sensors[i].desc);
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return (0);
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fail:
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if (ih != NULL)
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bus_teardown_intr(dev, sc->res[1], ih);
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if (rst != NULL)
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hwreset_release(rst);
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if (clk_ahb != NULL)
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clk_release(clk_ahb);
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if (clk_ths != NULL)
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clk_release(clk_ths);
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bus_release_resources(dev, aw_thermal_spec, sc->res);
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return (ENXIO);
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}
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static device_method_t aw_thermal_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, aw_thermal_probe),
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DEVMETHOD(device_attach, aw_thermal_attach),
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DEVMETHOD_END
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};
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static driver_t aw_thermal_driver = {
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"aw_thermal",
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aw_thermal_methods,
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sizeof(struct aw_thermal_softc),
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};
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static devclass_t aw_thermal_devclass;
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DRIVER_MODULE(aw_thermal, simplebus, aw_thermal_driver, aw_thermal_devclass,
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0, 0);
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MODULE_VERSION(aw_thermal, 1);
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