288 lines
7.2 KiB
C
288 lines
7.2 KiB
C
/* $NetBSD: s3c24x0_clk.c,v 1.6 2005/12/24 20:06:52 perry Exp $ */
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/*
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* Copyright (c) 2003 Genetec corporation. All rights reserved.
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* Written by Hiroyuki Bessho for Genetec corporation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of Genetec corporation may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY GENETEC CORP. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORP.
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/time.h>
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#include <sys/bus.h>
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#include <sys/resource.h>
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#include <sys/rman.h>
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#include <sys/timetc.h>
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#include <machine/bus.h>
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#include <machine/cpu.h>
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#include <machine/cpufunc.h>
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#include <machine/frame.h>
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#include <machine/resource.h>
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#include <machine/intr.h>
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#include <arm/samsung/s3c2xx0/s3c24x0reg.h>
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#include <arm/samsung/s3c2xx0/s3c24x0var.h>
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struct s3c24x0_timer_softc {
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device_t dev;
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} timer_softc;
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static unsigned s3c24x0_timer_get_timecount(struct timecounter *tc);
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static struct timecounter s3c24x0_timer_timecounter = {
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s3c24x0_timer_get_timecount, /* get_timecount */
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NULL, /* no poll_pps */
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~0u, /* counter_mask */
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3686400, /* frequency */
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"s3c24x0 timer", /* name */
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1000 /* quality */
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};
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static int
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s3c24x0_timer_probe(device_t dev)
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{
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device_set_desc(dev, "s3c24x0 timer");
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return (0);
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}
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static int
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s3c24x0_timer_attach(device_t dev)
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{
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timer_softc.dev = dev;
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/* We need to do this here for devices that expect DELAY to work */
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return (0);
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}
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static device_method_t s3c24x0_timer_methods[] = {
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DEVMETHOD(device_probe, s3c24x0_timer_probe),
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DEVMETHOD(device_attach, s3c24x0_timer_attach),
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{0, 0},
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};
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static driver_t s3c24x0_timer_driver = {
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"timer",
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s3c24x0_timer_methods,
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sizeof(struct s3c24x0_timer_softc),
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};
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static devclass_t s3c24x0_timer_devclass;
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DRIVER_MODULE(s3c24x0timer, s3c24x0, s3c24x0_timer_driver,
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s3c24x0_timer_devclass, 0, 0);
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#define TIMER_FREQUENCY(pclk) ((pclk)/16) /* divider=1/16 */
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static unsigned int timer4_reload_value;
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static unsigned int timer4_prescaler;
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static unsigned int timer4_mseccount;
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static volatile uint32_t s3c24x0_base;
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#define usec_to_counter(t) \
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((timer4_mseccount*(t))/1000)
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#define counter_to_usec(c,pclk) \
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(((c)*timer4_prescaler*1000)/(TIMER_FREQUENCY(pclk)/1000))
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static inline int
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read_timer(struct s3c24x0_softc *sc)
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{
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int count;
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do {
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count = bus_space_read_2(sc->sc_sx.sc_iot, sc->sc_timer_ioh,
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TIMER_TCNTO(4));
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} while ( __predict_false(count > timer4_reload_value) );
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return count;
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}
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static unsigned
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s3c24x0_timer_get_timecount(struct timecounter *tc)
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{
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struct s3c24x0_softc *sc = (struct s3c24x0_softc *)s3c2xx0_softc;
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int value;
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value = bus_space_read_2(sc->sc_sx.sc_iot, sc->sc_timer_ioh,
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TIMER_TCNTO(4));
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return (s3c24x0_base - value);
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}
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static int
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clock_intr(void *arg)
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{
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struct trapframe *fp = arg;
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atomic_add_32(&s3c24x0_base, timer4_reload_value);
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hardclock(TRAPF_USERMODE(fp), TRAPF_PC(fp));
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return (FILTER_HANDLED);
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}
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void
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cpu_initclocks(void)
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{
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struct s3c24x0_softc *sc = (struct s3c24x0_softc *)s3c2xx0_softc;
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long tc;
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struct resource *irq;
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int rid = 0;
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void *ihl;
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int err, prescaler;
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int pclk = s3c2xx0_softc->sc_pclk;
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bus_space_tag_t iot = sc->sc_sx.sc_iot;
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bus_space_handle_t ioh = sc->sc_timer_ioh;
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uint32_t reg;
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device_t dev = timer_softc.dev;
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/* We have already been initialized */
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if (timer4_reload_value != 0)
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return;
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#define time_constant(hz) (TIMER_FREQUENCY(pclk) /(hz)/ prescaler)
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#define calc_time_constant(hz) \
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do { \
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prescaler = 1; \
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do { \
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++prescaler; \
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tc = time_constant(hz); \
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} while( tc > 65536 ); \
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} while(0)
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/* Use the channels 4 and 3 for hardclock and statclock, respectively */
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/* stop all timers */
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bus_space_write_4(iot, ioh, TIMER_TCON, 0);
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/* calc suitable prescaler value */
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calc_time_constant(hz);
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timer4_prescaler = prescaler;
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timer4_reload_value = TIMER_FREQUENCY(pclk) / hz / prescaler;
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timer4_mseccount = TIMER_FREQUENCY(pclk)/timer4_prescaler/1000 ;
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bus_space_write_4(iot, ioh, TIMER_TCNTB(4),
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((prescaler - 1) << 16) | (timer4_reload_value - 1));
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printf("clock: hz=%d PCLK=%d prescaler=%d tc=%ld\n",
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hz, pclk, prescaler, tc);
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irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, S3C24X0_INT_TIMER4,
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S3C24X0_INT_TIMER4, 1, RF_ACTIVE);
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if (!irq)
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panic("Unable to allocate the clock irq handler.\n");
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err = bus_setup_intr(dev, irq, INTR_TYPE_CLK,
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clock_intr, NULL, NULL, &ihl);
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if (err != 0)
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panic("Unable to setup the clock irq handler.\n");
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/* set prescaler1 */
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reg = bus_space_read_4(iot, ioh, TIMER_TCFG0);
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bus_space_write_4(iot, ioh, TIMER_TCFG0,
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(reg & ~0xff00) | ((prescaler-1) << 8));
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/* divider 1/16 for ch #4 */
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reg = bus_space_read_4(iot, ioh, TIMER_TCFG1);
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bus_space_write_4(iot, ioh, TIMER_TCFG1,
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(reg & ~(TCFG1_MUX_MASK(4))) |
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(TCFG1_MUX_DIV16 << TCFG1_MUX_SHIFT(4)) );
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/* start timers */
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reg = bus_space_read_4(iot, ioh, TIMER_TCON);
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reg &= ~(TCON_MASK(4));
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/* load the time constant */
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bus_space_write_4(iot, ioh, TIMER_TCON, reg | TCON_MANUALUPDATE(4));
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/* set auto reload and start */
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bus_space_write_4(iot, ioh, TIMER_TCON, reg |
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TCON_AUTORELOAD(4) | TCON_START(4) );
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s3c24x0_timer_timecounter.tc_frequency = TIMER_FREQUENCY(pclk) /
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timer4_prescaler;
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tc_init(&s3c24x0_timer_timecounter);
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}
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/*
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* DELAY:
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*
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* Delay for at least N microseconds.
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*/
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void
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DELAY(int n)
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{
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struct s3c24x0_softc *sc = (struct s3c24x0_softc *) s3c2xx0_softc;
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int v0, v1, delta;
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u_int ucnt;
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if (timer4_reload_value == 0) {
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/* not initialized yet */
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while ( n-- > 0 ){
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int m;
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for (m = 0; m < 100; ++m )
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;
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}
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return;
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}
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/* read down counter */
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v0 = read_timer(sc);
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ucnt = usec_to_counter(n);
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while( ucnt > 0 ) {
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v1 = read_timer(sc);
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delta = v0 - v1;
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if ( delta < 0 )
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delta += timer4_reload_value;
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if((u_int)delta < ucnt){
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ucnt -= (u_int)delta;
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v0 = v1;
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}
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else {
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ucnt = 0;
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}
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}
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}
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void
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cpu_startprofclock(void)
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{
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}
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void
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cpu_stopprofclock(void)
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{
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}
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