293 lines
8.0 KiB
C
293 lines
8.0 KiB
C
/*-
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* Copyright (c) 2005 Olivier Houchard. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/malloc.h>
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#include <sys/rman.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/proc.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <vm/vm_map.h>
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#include <machine/bus.h>
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#include <machine/cpu.h>
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#include <machine/md_var.h>
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#include <arm/xscale/i80321/i80321reg.h>
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#include <arm/xscale/i80321/i80321var.h>
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#include <arm/xscale/i80321/iq80321reg.h>
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#include <arm/xscale/i80321/iq80321var.h>
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#include <arm/xscale/i80321/i80321_intr.h>
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typedef struct i80321_aaudesc_s {
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vm_paddr_t next_desc;
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uint32_t sar[4];
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vm_paddr_t local_addr;
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vm_size_t count;
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uint32_t descr_ctrl;
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} __packed i80321_aaudesc_t;
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typedef struct i80321_aauring_s {
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i80321_aaudesc_t *desc;
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vm_paddr_t phys_addr;
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bus_dmamap_t map;
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} i80321_aauring_t;
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#define AAU_RING_SIZE 64
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struct i80321_aau_softc {
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bus_space_tag_t sc_st;
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bus_space_handle_t sc_aau_sh;
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bus_dma_tag_t dmatag;
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i80321_aauring_t aauring[AAU_RING_SIZE];
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int flags;
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#define BUSY 0x1
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int unit;
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struct mtx mtx;
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};
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static int
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i80321_aau_probe(device_t dev)
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{
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device_set_desc(dev, "I80321 AAU");
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return (0);
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}
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static struct i80321_aau_softc *aau_softc;
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static void
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i80321_mapphys(void *arg, bus_dma_segment_t *segs, int nseg, int error)
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{
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vm_paddr_t *addr = (vm_paddr_t *)arg;
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*addr = segs->ds_addr;
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}
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#define AAU_REG_WRITE(softc, reg, val) \
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bus_space_write_4((softc)->sc_st, (softc)->sc_aau_sh, \
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(reg), (val))
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#define AAU_REG_READ(softc, reg) \
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bus_space_read_4((softc)->sc_st, (softc)->sc_aau_sh, \
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(reg))
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static int aau_bzero(void *, int, int);
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static int
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i80321_aau_attach(device_t dev)
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{
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struct i80321_aau_softc *softc = device_get_softc(dev);
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struct i80321_softc *sc = device_get_softc(device_get_parent(dev));
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struct i80321_aaudesc_s *aaudescs;
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mtx_init(&softc->mtx, "AAU mtx", NULL, MTX_SPIN);
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softc->sc_st = sc->sc_st;
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if (bus_space_subregion(softc->sc_st, sc->sc_sh, VERDE_AAU_BASE,
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VERDE_AAU_SIZE, &softc->sc_aau_sh) != 0)
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panic("%s: unable to subregion AAU registers",
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device_get_name(dev));
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if (bus_dma_tag_create(NULL, sizeof(i80321_aaudesc_t), 0,
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BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL,
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AAU_RING_SIZE * sizeof(i80321_aaudesc_t),
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1, sizeof(i80321_aaudesc_t), BUS_DMA_ALLOCNOW, busdma_lock_mutex,
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&Giant, &softc->dmatag))
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panic("Couldn't create a dma tag");
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if (bus_dmamem_alloc(softc->dmatag, (void **)&aaudescs,
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BUS_DMA_NOWAIT | BUS_DMA_COHERENT, &softc->aauring[0].map))
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panic("Couldn't alloc dma memory");
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for (int i = 0; i < AAU_RING_SIZE; i++) {
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if (i > 0)
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if (bus_dmamap_create(softc->dmatag, 0,
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&softc->aauring[i].map))
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panic("Couldn't create dma map");
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softc->aauring[i].desc = &aaudescs[i];
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bus_dmamap_load(softc->dmatag, softc->aauring[i].map,
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softc->aauring[i].desc, sizeof(i80321_aaudesc_t),
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i80321_mapphys, &softc->aauring[i].phys_addr, 0);
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bzero(softc->aauring[i].desc, sizeof(i80321_aaudesc_t));
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}
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aau_softc = softc;
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_arm_bzero = aau_bzero;
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_min_bzero_size = 1024;
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return (0);
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}
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static __inline void
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test_virt_addr(void *addr, int len)
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{
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int to_nextpage;
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while (len > 0) {
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*(char *)addr = 0;
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to_nextpage = ((vm_offset_t)addr & ~PAGE_MASK) +
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PAGE_SIZE - (vm_offset_t)addr;
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if (to_nextpage >= len)
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break;
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len -= to_nextpage;
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addr = (void *)((vm_offset_t)addr + to_nextpage);
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}
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}
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static int
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aau_bzero(void *dst, int len, int flags)
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{
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struct i80321_aau_softc *sc = aau_softc;
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i80321_aaudesc_t *desc;
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int ret;
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int csr;
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int descnb = 0;
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int tmplen = len;
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int to_nextpagedst;
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int min_hop;
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vm_paddr_t pa, tmppa;
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if (!sc)
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return (-1);
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mtx_lock_spin(&sc->mtx);
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if (sc->flags & BUSY) {
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mtx_unlock_spin(&sc->mtx);
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return (-1);
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}
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sc->flags |= BUSY;
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mtx_unlock_spin(&sc->mtx);
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desc = sc->aauring[0].desc;
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if (flags & IS_PHYSICAL) {
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desc->local_addr = (vm_paddr_t)dst;
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desc->next_desc = 0;
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desc->count = len;
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desc->descr_ctrl = 2 << 1 | 1 << 31; /* Fill, enable dest write */
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bus_dmamap_sync(sc->dmatag, sc->aauring[0].map,
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BUS_DMASYNC_PREWRITE);
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} else {
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test_virt_addr(dst, len);
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if ((vm_offset_t)dst & (31))
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cpu_dcache_wb_range((vm_offset_t)dst & ~31, 32);
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if (((vm_offset_t)dst + len) & 31)
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cpu_dcache_wb_range(((vm_offset_t)dst + len) & ~31,
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32);
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cpu_dcache_inv_range((vm_offset_t)dst, len);
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while (tmplen > 0) {
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pa = vtophys(dst);
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to_nextpagedst = ((vm_offset_t)dst & ~PAGE_MASK) +
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PAGE_SIZE - (vm_offset_t)dst;
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while (to_nextpagedst < tmplen) {
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tmppa = vtophys((vm_offset_t)dst +
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to_nextpagedst);
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if (tmppa != pa + to_nextpagedst)
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break;
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to_nextpagedst += PAGE_SIZE;
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}
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min_hop = to_nextpagedst;
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if (min_hop < 64) {
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tmplen -= min_hop;
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bzero(dst, min_hop);
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cpu_dcache_wbinv_range((vm_offset_t)dst,
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min_hop);
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dst = (void *)((vm_offset_t)dst + min_hop);
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if (tmplen <= 0 && descnb > 0) {
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sc->aauring[descnb - 1].desc->next_desc
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= 0;
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bus_dmamap_sync(sc->dmatag,
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sc->aauring[descnb - 1].map,
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BUS_DMASYNC_PREWRITE);
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}
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continue;
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}
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desc->local_addr = pa;
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desc->count = tmplen > min_hop ? min_hop : tmplen;
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desc->descr_ctrl = 2 << 1 | 1 << 31; /* Fill, enable dest write */;
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if (min_hop < tmplen) {
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tmplen -= min_hop;
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dst = (void *)((vm_offset_t)dst + min_hop);
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} else
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tmplen = 0;
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if (descnb + 1 >= AAU_RING_SIZE) {
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mtx_lock_spin(&sc->mtx);
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sc->flags &= ~BUSY;
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mtx_unlock_spin(&sc->mtx);
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return (-1);
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}
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if (tmplen > 0) {
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desc->next_desc = sc->aauring[descnb + 1].
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phys_addr;
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bus_dmamap_sync(sc->dmatag,
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sc->aauring[descnb].map,
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BUS_DMASYNC_PREWRITE);
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desc = sc->aauring[descnb + 1].desc;
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descnb++;
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} else {
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desc->next_desc = 0;
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bus_dmamap_sync(sc->dmatag,
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sc->aauring[descnb].map,
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BUS_DMASYNC_PREWRITE);
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}
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}
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}
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AAU_REG_WRITE(sc, 0x0c /* Descriptor addr */,
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sc->aauring[0].phys_addr);
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AAU_REG_WRITE(sc, 0 /* Control register */, 1 << 0/* Start transfer */);
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while ((csr = AAU_REG_READ(sc, 0x4)) & (1 << 10));
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/* Wait until it's done. */
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if (csr & (1 << 5)) /* error */
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ret = -1;
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else
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ret = 0;
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/* Clear the interrupt. */
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AAU_REG_WRITE(sc, 0x4, csr);
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/* Stop the AAU. */
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AAU_REG_WRITE(sc, 0, 0);
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mtx_lock_spin(&sc->mtx);
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sc->flags &= ~BUSY;
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mtx_unlock_spin(&sc->mtx);
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return (ret);
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}
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static device_method_t i80321_aau_methods[] = {
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DEVMETHOD(device_probe, i80321_aau_probe),
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DEVMETHOD(device_attach, i80321_aau_attach),
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{0, 0},
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};
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static driver_t i80321_aau_driver = {
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"i80321_aau",
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i80321_aau_methods,
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sizeof(struct i80321_aau_softc),
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};
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static devclass_t i80321_aau_devclass;
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DRIVER_MODULE(i80321_aau, iq, i80321_aau_driver, i80321_aau_devclass, 0, 0);
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