7453645f2a
All devices: - add support for rate adaptation via ieee80211_amrr(9); - use short preamble for transmitted frames when needed; - multi-bss support: * for RTL8821AU: 2 VAPs at the same time; * other: 1 any VAP + 1 sta VAP. RTL8188CE: - fix IQ calibration bug (reason of significant speed degradation); - add h/w crypto acceleration support. USB: - A-MPDU Tx support; - short GI support; Other: - add support for RTL8812AU / RTL8821AU chipsets (a/b/g/n only; no ac yet); - split merged code into subparts: * bus glue (usb/*, pci/*, rtl*/usb/*, rtl*/pci/*) * common (if_rtwn*) * chip-specific (rtl*/*) - various other bugfixes. Due to code reorganization, module names / requirements were changed too: urtwn urtwnfw -> rtwn rtwn_usb rtwnfw rtwn rtwnfw -> rtwn rtwn_pci rtwnfw Tested with RTL8188CE, RTL8188CUS, RTL8188EU and RTL8821AU. Tested by: kevlo, garga, Peter Garshtja <peter.garshtja@ambient-md.com>, Kevin McAleavey <kevin.mcaleavey@knosproject.com>, Ilias-Dimitrios Vrachnis <id@vrachnis.com>, <otacilio.neto@bsd.com.br> Relnotes: yes
287 lines
7.5 KiB
C
287 lines
7.5 KiB
C
/*-
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* Copyright (c) 2016 Andriy Voskoboinyk <avos@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_wlan.h"
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#include <sys/param.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/mbuf.h>
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#include <sys/kernel.h>
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#include <sys/socket.h>
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#include <sys/systm.h>
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#include <sys/malloc.h>
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#include <sys/queue.h>
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#include <sys/taskqueue.h>
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#include <sys/bus.h>
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#include <sys/endian.h>
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#include <sys/linker.h>
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#include <net/if.h>
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#include <net/ethernet.h>
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#include <net/if_media.h>
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#include <net80211/ieee80211_var.h>
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#include <net80211/ieee80211_radiotap.h>
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#include <dev/rtwn/if_rtwnreg.h>
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#include <dev/rtwn/if_rtwnvar.h>
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#include <dev/rtwn/if_rtwn_debug.h>
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#include <dev/rtwn/rtl8812a/r12a.h>
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#include <dev/rtwn/rtl8812a/r12a_priv.h>
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#include <dev/rtwn/rtl8812a/r12a_reg.h>
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#include <dev/rtwn/rtl8812a/r12a_var.h>
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void
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r12a_lc_calib(struct rtwn_softc *sc)
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{
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uint32_t chnlbw;
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uint8_t txmode;
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RTWN_DPRINTF(sc, RTWN_DEBUG_CALIB,
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"%s: LC calibration started\n", __func__);
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txmode = rtwn_read_1(sc, R12A_SINGLETONE_CONT_TX + 2);
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if ((txmode & 0x07) != 0) {
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/* Disable all continuous Tx. */
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/*
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* Skipped because BB turns off continuous Tx until
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* next packet comes in.
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*/
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} else {
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/* Block all Tx queues. */
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rtwn_write_1(sc, R92C_TXPAUSE, R92C_TX_QUEUE_ALL);
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}
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/* Enter LCK mode. */
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rtwn_rf_setbits(sc, 0, R12A_RF_LCK, 0, R12A_RF_LCK_MODE);
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/* Start calibration. */
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chnlbw = rtwn_rf_read(sc, 0, R92C_RF_CHNLBW);
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rtwn_rf_write(sc, 0, R92C_RF_CHNLBW, chnlbw | R92C_RF_CHNLBW_LCSTART);
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/* Give calibration the time to complete. */
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rtwn_delay(sc, 150000); /* 150 ms */
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/* Leave LCK mode. */
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rtwn_rf_setbits(sc, 0, R12A_RF_LCK, R12A_RF_LCK_MODE, 0);
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/* Restore configuration. */
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if ((txmode & 0x07) != 0) {
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/* Continuous Tx case. */
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/*
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* Skipped because BB turns off continuous Tx until
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* next packet comes in.
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*/
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} else {
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/* Unblock all Tx queues. */
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rtwn_write_1(sc, R92C_TXPAUSE, 0);
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}
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/* Recover channel number. */
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rtwn_rf_write(sc, 0, R92C_RF_CHNLBW, chnlbw);
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RTWN_DPRINTF(sc, RTWN_DEBUG_CALIB,
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"%s: LC calibration finished\n", __func__);
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}
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#ifndef RTWN_WITHOUT_UCODE
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int
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r12a_iq_calib_fw_supported(struct rtwn_softc *sc)
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{
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if (sc->fwver == 0x19)
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return (1);
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return (0);
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}
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#endif
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void
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r12a_save_bb_afe_vals(struct rtwn_softc *sc, uint32_t vals[],
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const uint16_t regs[], int size)
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{
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int i;
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/* Select page C. */
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rtwn_bb_setbits(sc, R12A_TXAGC_TABLE_SELECT, 0x80000000, 0);
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for (i = 0; i < size; i++)
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vals[i] = rtwn_bb_read(sc, regs[i]);
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}
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void
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r12a_restore_bb_afe_vals(struct rtwn_softc *sc, uint32_t vals[],
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const uint16_t regs[], int size)
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{
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int i;
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/* Select page C. */
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rtwn_bb_setbits(sc, R12A_TXAGC_TABLE_SELECT, 0x80000000, 0);
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for (i = 0; i < size; i++)
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rtwn_bb_write(sc, regs[i], vals[i]);
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}
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void
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r12a_save_rf_vals(struct rtwn_softc *sc, uint32_t vals[],
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const uint8_t regs[], int size)
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{
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int c, i;
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/* Select page C. */
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rtwn_bb_setbits(sc, R12A_TXAGC_TABLE_SELECT, 0x80000000, 0);
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for (c = 0; c < sc->nrxchains; c++)
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for (i = 0; i < size; i++)
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vals[c * size + i] = rtwn_rf_read(sc, c, regs[i]);
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}
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void
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r12a_restore_rf_vals(struct rtwn_softc *sc, uint32_t vals[],
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const uint8_t regs[], int size)
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{
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int c, i;
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/* Select page C. */
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rtwn_bb_setbits(sc, R12A_TXAGC_TABLE_SELECT, 0x80000000, 0);
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for (c = 0; c < sc->nrxchains; c++)
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for (i = 0; i < size; i++)
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rtwn_rf_write(sc, c, regs[i], vals[c * size + i]);
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}
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#ifdef RTWN_TODO
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static void
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r12a_iq_tx(struct rtwn_softc *sc)
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{
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/* TODO */
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}
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static void
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r12a_iq_config_mac(struct rtwn_softc *sc)
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{
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/* Select page C. */
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rtwn_bb_setbits(sc, R12A_TXAGC_TABLE_SELECT, 0x80000000, 0);
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rtwn_write_1(sc, R92C_TXPAUSE,
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R92C_TX_QUEUE_AC | R92C_TX_QUEUE_MGT | R92C_TX_QUEUE_HIGH);
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/* BCN_CTRL & BCN_CTRL1 */
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rtwn_setbits_1(sc, R92C_BCN_CTRL(0), R92C_BCN_CTRL_EN_BCN, 0);
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rtwn_setbits_1(sc, R92C_BCN_CTRL(1), R92C_BCN_CTRL_EN_BCN, 0);
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/* Rx ant off */
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rtwn_write_1(sc, R12A_OFDMCCK_EN, 0);
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/* CCA off */
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rtwn_bb_setbits(sc, R12A_CCA_ON_SEC, 0x03, 0x0c);
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/* CCK RX Path off */
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rtwn_write_1(sc, R12A_CCK_RX_PATH + 3, 0x0f);
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}
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#endif
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void
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r12a_iq_calib_sw(struct rtwn_softc *sc)
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{
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#define R12A_MAX_NRXCHAINS 2
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uint32_t bb_vals[nitems(r12a_iq_bb_regs)];
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uint32_t afe_vals[nitems(r12a_iq_afe_regs)];
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uint32_t rf_vals[nitems(r12a_iq_rf_regs) * R12A_MAX_NRXCHAINS];
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uint32_t rfe[2];
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KASSERT(sc->nrxchains <= R12A_MAX_NRXCHAINS,
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("nrxchains > %d (%d)\n", R12A_MAX_NRXCHAINS, sc->nrxchains));
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/* Save registers. */
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r12a_save_bb_afe_vals(sc, bb_vals, r12a_iq_bb_regs,
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nitems(r12a_iq_bb_regs));
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/* Select page C1. */
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rtwn_bb_setbits(sc, R12A_TXAGC_TABLE_SELECT, 0, 0x80000000);
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rfe[0] = rtwn_bb_read(sc, R12A_RFE(0));
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rfe[1] = rtwn_bb_read(sc, R12A_RFE(1));
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r12a_save_bb_afe_vals(sc, afe_vals, r12a_iq_afe_regs,
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nitems(r12a_iq_afe_regs));
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r12a_save_rf_vals(sc, rf_vals, r12a_iq_rf_regs,
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nitems(r12a_iq_rf_regs));
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#ifdef RTWN_TODO
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/* Configure MAC. */
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rtwn_iq_config_mac(sc);
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rtwn_iq_tx(sc);
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#endif
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r12a_restore_rf_vals(sc, rf_vals, r12a_iq_rf_regs,
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nitems(r12a_iq_rf_regs));
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r12a_restore_bb_afe_vals(sc, afe_vals, r12a_iq_afe_regs,
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nitems(r12a_iq_afe_regs));
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/* Select page C1. */
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rtwn_bb_setbits(sc, R12A_TXAGC_TABLE_SELECT, 0, 0x80000000);
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/* Chain 0. */
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rtwn_bb_write(sc, R12A_SLEEP_NAV(0), 0);
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rtwn_bb_write(sc, R12A_PMPD(0), 0);
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rtwn_bb_write(sc, 0xc88, 0);
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rtwn_bb_write(sc, 0xc8c, 0x3c000000);
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rtwn_bb_setbits(sc, 0xc90, 0, 0x00000080);
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rtwn_bb_setbits(sc, 0xcc4, 0, 0x20040000);
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rtwn_bb_setbits(sc, 0xcc8, 0, 0x20000000);
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/* Chain 1. */
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rtwn_bb_write(sc, R12A_SLEEP_NAV(1), 0);
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rtwn_bb_write(sc, R12A_PMPD(1), 0);
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rtwn_bb_write(sc, 0xe88, 0);
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rtwn_bb_write(sc, 0xe8c, 0x3c000000);
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rtwn_bb_setbits(sc, 0xe90, 0, 0x00000080);
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rtwn_bb_setbits(sc, 0xec4, 0, 0x20040000);
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rtwn_bb_setbits(sc, 0xec8, 0, 0x20000000);
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rtwn_bb_write(sc, R12A_RFE(0), rfe[0]);
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rtwn_bb_write(sc, R12A_RFE(1), rfe[1]);
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r12a_restore_bb_afe_vals(sc, bb_vals, r12a_iq_bb_regs,
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nitems(r12a_iq_bb_regs));
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#undef R12A_MAX_NRXCHAINS
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}
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void
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r12a_iq_calib(struct rtwn_softc *sc)
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{
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#ifndef RTWN_WITHOUT_UCODE
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if ((sc->sc_flags & RTWN_FW_LOADED) &&
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rtwn_r12a_iq_calib_fw_supported(sc))
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r12a_iq_calib_fw(sc);
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else
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#endif
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rtwn_r12a_iq_calib_sw(sc);
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}
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