KATO Takenori e747d90dbf Don't disable CPU cache in init_486dlc. If BIOS supports Cyrix 486, ...

BIOS enables CPU cache and other registers.  If BIOS does not supports
it, CPU cache is disabled at reset time.

This commit closes PR/3292.

PR:		3292

1997-04-19 05:25:19 +00:00

..

amd64

Don't disable CPU cache in init_486dlc. If BIOS supports Cyrix 486,

1997-04-19 05:25:19 +00:00

conf

GENERIC, LINT:

1997-04-14 00:35:25 +00:00

include

Only do indirections in ENTRY() if _ARCH_INDIRECT is defined.

1997-04-15 14:06:34 +00:00

isa

Prevent wedging of the stat clock because of missed interrupts.

1997-04-06 13:25:48 +00:00

pci

Mask out revision register in consistency test of class register.

1997-04-09 11:34:50 +00:00

Makefile

Back out part 1 of the MCFH that changed $Id$ to $FreeBSD$. We are not

1997-02-22 09:48:43 +00:00