0adf4921fb
This driver is based on Linux 3.8 and a previous effort by kan@.
More informations about this project can be found on the FreeBSD wiki:
https://wiki.freebsd.org/AMD_GPU
The driver is split into:
sys/dev/drm2:
The driver sources.
sys/modules/drm2/radeonkmw:
The driver main kernel module's Makefile.
sys/modules/drm2/radeonkmsfw:
All firmware kernel module Makefiles. There's one directory and one
Makefile for each firmware.
sys/contrib/dev/drm2/radeonkmsfw:
All firmware binary sources.
tools/tools/drm/radeon
Tools to update firmwares or regenerate some headers.
Merging the driver to FreeBSD 9.x may be possible but not a priority for
now.
Help from: kib@, kan@
Tested by: avg@, kwm@, ray@,
Alexander Yerenkow <yerenkow@gmail.com>,
Anders Bolt-Evensen <andersbo87@me.com>,
Denis Djubajlo <stdedjub@googlemail.com>,
J.R. Oldroyd <fbsd@opal.com>,
Mikaël Urankar <mikael.urankar@gmail.com>,
Pierre-Emmanuel Pédron <pepcitron@gmail.com>,
Sam Fourman Jr. <sfourman@gmail.com>,
Wade <wade-is-great@live.com>,
(probably other I forgot...)
HW donations: kyzh, Yakaz
255 lines
5.8 KiB
C
255 lines
5.8 KiB
C
/*
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* Copyright 2011 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Alex Deucher <alexander.deucher@amd.com>
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <dev/drm2/drmP.h>
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const u32 si_default_state[] =
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{
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0xc0066900,
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0x00000000,
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0x00000060, /* DB_RENDER_CONTROL */
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0x00000000, /* DB_COUNT_CONTROL */
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0x00000000, /* DB_DEPTH_VIEW */
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0x0000002a, /* DB_RENDER_OVERRIDE */
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0x00000000, /* DB_RENDER_OVERRIDE2 */
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0x00000000, /* DB_HTILE_DATA_BASE */
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0xc0046900,
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0x00000008,
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0x00000000, /* DB_DEPTH_BOUNDS_MIN */
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0x00000000, /* DB_DEPTH_BOUNDS_MAX */
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0x00000000, /* DB_STENCIL_CLEAR */
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0x00000000, /* DB_DEPTH_CLEAR */
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0xc0036900,
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0x0000000f,
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0x00000000, /* DB_DEPTH_INFO */
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0x00000000, /* DB_Z_INFO */
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0x00000000, /* DB_STENCIL_INFO */
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0xc0016900,
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0x00000080,
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0x00000000, /* PA_SC_WINDOW_OFFSET */
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0xc00d6900,
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0x00000083,
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0x0000ffff, /* PA_SC_CLIPRECT_RULE */
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0x00000000, /* PA_SC_CLIPRECT_0_TL */
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0x20002000, /* PA_SC_CLIPRECT_0_BR */
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0x00000000,
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0x20002000,
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0x00000000,
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0x20002000,
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0x00000000,
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0x20002000,
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0xaaaaaaaa, /* PA_SC_EDGERULE */
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0x00000000, /* PA_SU_HARDWARE_SCREEN_OFFSET */
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0x0000000f, /* CB_TARGET_MASK */
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0x0000000f, /* CB_SHADER_MASK */
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0xc0226900,
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0x00000094,
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0x80000000, /* PA_SC_VPORT_SCISSOR_0_TL */
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0x20002000, /* PA_SC_VPORT_SCISSOR_0_BR */
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0x80000000,
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0x20002000,
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0x80000000,
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0x20002000,
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0x80000000,
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0x20002000,
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0x80000000,
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0x20002000,
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0x80000000,
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0x20002000,
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0x80000000,
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0x20002000,
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0x80000000,
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0x20002000,
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0x80000000,
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0x20002000,
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0x80000000,
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0x20002000,
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0x80000000,
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0x20002000,
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0x80000000,
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0x20002000,
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0x80000000,
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0x20002000,
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0x80000000,
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0x20002000,
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0x80000000,
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0x20002000,
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0x80000000,
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0x20002000,
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0x00000000, /* PA_SC_VPORT_ZMIN_0 */
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0x3f800000, /* PA_SC_VPORT_ZMAX_0 */
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0xc0026900,
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0x000000d9,
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0x00000000, /* CP_RINGID */
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0x00000000, /* CP_VMID */
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0xc0046900,
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0x00000100,
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0xffffffff, /* VGT_MAX_VTX_INDX */
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0x00000000, /* VGT_MIN_VTX_INDX */
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0x00000000, /* VGT_INDX_OFFSET */
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0x00000000, /* VGT_MULTI_PRIM_IB_RESET_INDX */
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0xc0046900,
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0x00000105,
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0x00000000, /* CB_BLEND_RED */
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0x00000000, /* CB_BLEND_GREEN */
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0x00000000, /* CB_BLEND_BLUE */
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0x00000000, /* CB_BLEND_ALPHA */
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0xc0016900,
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0x000001e0,
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0x00000000, /* CB_BLEND0_CONTROL */
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0xc00e6900,
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0x00000200,
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0x00000000, /* DB_DEPTH_CONTROL */
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0x00000000, /* DB_EQAA */
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0x00cc0010, /* CB_COLOR_CONTROL */
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0x00000210, /* DB_SHADER_CONTROL */
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0x00010000, /* PA_CL_CLIP_CNTL */
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0x00000004, /* PA_SU_SC_MODE_CNTL */
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0x00000100, /* PA_CL_VTE_CNTL */
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0x00000000, /* PA_CL_VS_OUT_CNTL */
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0x00000000, /* PA_CL_NANINF_CNTL */
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0x00000000, /* PA_SU_LINE_STIPPLE_CNTL */
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0x00000000, /* PA_SU_LINE_STIPPLE_SCALE */
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0x00000000, /* PA_SU_PRIM_FILTER_CNTL */
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0x00000000, /* */
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0x00000000, /* */
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0xc0116900,
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0x00000280,
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0x00000000, /* PA_SU_POINT_SIZE */
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0x00000000, /* PA_SU_POINT_MINMAX */
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0x00000008, /* PA_SU_LINE_CNTL */
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0x00000000, /* PA_SC_LINE_STIPPLE */
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0x00000000, /* VGT_OUTPUT_PATH_CNTL */
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0x00000000, /* VGT_HOS_CNTL */
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0x00000000,
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0x00000000,
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0x00000000,
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0x00000000,
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0x00000000,
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0x00000000,
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0x00000000,
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0x00000000,
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0x00000000,
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0x00000000,
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0x00000000, /* VGT_GS_MODE */
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0xc0026900,
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0x00000292,
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0x00000000, /* PA_SC_MODE_CNTL_0 */
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0x00000000, /* PA_SC_MODE_CNTL_1 */
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0xc0016900,
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0x000002a1,
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0x00000000, /* VGT_PRIMITIVEID_EN */
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0xc0016900,
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0x000002a5,
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0x00000000, /* VGT_MULTI_PRIM_IB_RESET_EN */
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0xc0026900,
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0x000002a8,
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0x00000000, /* VGT_INSTANCE_STEP_RATE_0 */
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0x00000000,
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0xc0026900,
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0x000002ad,
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0x00000000, /* VGT_REUSE_OFF */
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0x00000000,
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0xc0016900,
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0x000002d5,
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0x00000000, /* VGT_SHADER_STAGES_EN */
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0xc0016900,
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0x000002dc,
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0x0000aa00, /* DB_ALPHA_TO_MASK */
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0xc0066900,
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0x000002de,
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0x00000000, /* PA_SU_POLY_OFFSET_DB_FMT_CNTL */
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0x00000000,
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0x00000000,
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0x00000000,
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0x00000000,
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0x00000000,
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0xc0026900,
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0x000002e5,
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0x00000000, /* VGT_STRMOUT_CONFIG */
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0x00000000,
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0xc01b6900,
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0x000002f5,
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0x76543210, /* PA_SC_CENTROID_PRIORITY_0 */
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0xfedcba98, /* PA_SC_CENTROID_PRIORITY_1 */
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0x00000000, /* PA_SC_LINE_CNTL */
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0x00000000, /* PA_SC_AA_CONFIG */
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0x00000005, /* PA_SU_VTX_CNTL */
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0x3f800000, /* PA_CL_GB_VERT_CLIP_ADJ */
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0x3f800000, /* PA_CL_GB_VERT_DISC_ADJ */
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0x3f800000, /* PA_CL_GB_HORZ_CLIP_ADJ */
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0x3f800000, /* PA_CL_GB_HORZ_DISC_ADJ */
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0x00000000, /* PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0 */
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0x00000000,
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0x00000000,
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0x00000000,
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0x00000000,
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0x00000000,
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0x00000000,
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0x00000000,
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0x00000000,
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0x00000000,
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0x00000000,
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0x00000000,
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0x00000000,
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0x00000000,
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0x00000000,
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0x00000000,
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0xffffffff, /* PA_SC_AA_MASK_X0Y0_X1Y0 */
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0xffffffff,
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0xc0026900,
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0x00000316,
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0x0000000e, /* VGT_VERTEX_REUSE_BLOCK_CNTL */
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0x00000010, /* */
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};
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const u32 si_default_size = DRM_ARRAY_SIZE(si_default_state);
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