John Baldwin 8aba835b8e Bump CACHE_LINE_SIZE to 128 for x86. Intel's manuals explicitly recommend
using 128 byte alignment for locks.  (See IA-32 SDM Vol 3A 7.11.6.7)
2009-05-18 19:33:59 +00:00
..
2009-04-15 17:31:22 +00:00
2009-03-05 16:56:16 +00:00
2009-04-15 17:31:22 +00:00
2009-05-06 17:48:39 +00:00
2009-05-16 22:08:00 +00:00