e1b74f21f5
IPv4/IPv6 checksum offloading and VLAN tag insertion/stripping. Since uether doesn't provide a way to announce driver specific offload capabilities to upper stack, checksum offloading support needs more work and will be done in the future. Special thanks to Hayes Wang from RealTek who gave input.
1071 lines
26 KiB
C
1071 lines
26 KiB
C
/*-
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* Copyright (c) 2015 Kevin Lo <kevlo@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/condvar.h>
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#include <sys/kernel.h>
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#include <sys/lock.h>
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#include <sys/module.h>
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#include <sys/mutex.h>
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#include <sys/socket.h>
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#include <sys/sysctl.h>
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#include <sys/unistd.h>
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#include <net/if.h>
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#include <net/if_var.h>
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#include <dev/usb/usb.h>
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#include <dev/usb/usbdi.h>
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#include <dev/usb/usbdi_util.h>
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#include "usbdevs.h"
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#define USB_DEBUG_VAR ure_debug
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#include <dev/usb/usb_debug.h>
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#include <dev/usb/usb_process.h>
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#include <dev/usb/net/usb_ethernet.h>
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#include <dev/usb/net/if_urereg.h>
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#ifdef USB_DEBUG
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static int ure_debug = 0;
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static SYSCTL_NODE(_hw_usb, OID_AUTO, ure, CTLFLAG_RW, 0, "USB ure");
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SYSCTL_INT(_hw_usb_ure, OID_AUTO, debug, CTLFLAG_RWTUN, &ure_debug, 0,
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"Debug level");
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#endif
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/*
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* Various supported device vendors/products.
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*/
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static const STRUCT_USB_HOST_ID ure_devs[] = {
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#define URE_DEV(v,p) { USB_VP(USB_VENDOR_##v, USB_PRODUCT_##v##_##p) }
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URE_DEV(REALTEK, RTL8152),
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#undef URE_DEV
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};
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static device_probe_t ure_probe;
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static device_attach_t ure_attach;
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static device_detach_t ure_detach;
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static usb_callback_t ure_bulk_read_callback;
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static usb_callback_t ure_bulk_write_callback;
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static miibus_readreg_t ure_miibus_readreg;
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static miibus_writereg_t ure_miibus_writereg;
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static miibus_statchg_t ure_miibus_statchg;
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static uether_fn_t ure_attach_post;
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static uether_fn_t ure_init;
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static uether_fn_t ure_stop;
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static uether_fn_t ure_start;
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static uether_fn_t ure_tick;
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static uether_fn_t ure_setmulti;
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static uether_fn_t ure_setpromisc;
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static int ure_ctl(struct ure_softc *, uint8_t, uint16_t, uint16_t,
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void *, int);
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static int ure_read_mem(struct ure_softc *, uint16_t, uint16_t, void *,
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int);
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static int ure_write_mem(struct ure_softc *, uint16_t, uint16_t, void *,
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int);
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static uint8_t ure_read_1(struct ure_softc *, uint16_t, uint16_t);
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static uint16_t ure_read_2(struct ure_softc *, uint16_t, uint16_t);
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static uint32_t ure_read_4(struct ure_softc *, uint16_t, uint16_t);
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static int ure_write_1(struct ure_softc *, uint16_t, uint16_t, uint32_t);
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static int ure_write_2(struct ure_softc *, uint16_t, uint16_t, uint32_t);
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static int ure_write_4(struct ure_softc *, uint16_t, uint16_t, uint32_t);
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static uint16_t ure_ocp_reg_read(struct ure_softc *, uint16_t);
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static void ure_ocp_reg_write(struct ure_softc *, uint16_t, uint16_t);
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static void ure_read_chipver(struct ure_softc *);
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static int ure_attach_post_sub(struct usb_ether *);
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static void ure_reset(struct ure_softc *);
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static int ure_ifmedia_upd(struct ifnet *);
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static void ure_ifmedia_sts(struct ifnet *, struct ifmediareq *);
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static int ure_ioctl(struct ifnet *, u_long, caddr_t);
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static void ure_rtl8152_init(struct ure_softc *);
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static void ure_disable_teredo(struct ure_softc *);
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static void ure_init_fifo(struct ure_softc *);
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static const struct usb_config ure_config[URE_N_TRANSFER] = {
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[URE_BULK_DT_WR] = {
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.type = UE_BULK,
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.endpoint = UE_ADDR_ANY,
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.direction = UE_DIR_OUT,
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.bufsize = MCLBYTES,
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.flags = {.pipe_bof = 1,.force_short_xfer = 1,},
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.callback = ure_bulk_write_callback,
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.timeout = 10000, /* 10 seconds */
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},
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[URE_BULK_DT_RD] = {
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.type = UE_BULK,
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.endpoint = UE_ADDR_ANY,
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.direction = UE_DIR_IN,
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.bufsize = MCLBYTES,
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.flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
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.callback = ure_bulk_read_callback,
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.timeout = 0, /* no timeout */
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},
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};
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static device_method_t ure_methods[] = {
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/* Device interface. */
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DEVMETHOD(device_probe, ure_probe),
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DEVMETHOD(device_attach, ure_attach),
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DEVMETHOD(device_detach, ure_detach),
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/* MII interface. */
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DEVMETHOD(miibus_readreg, ure_miibus_readreg),
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DEVMETHOD(miibus_writereg, ure_miibus_writereg),
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DEVMETHOD(miibus_statchg, ure_miibus_statchg),
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DEVMETHOD_END
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};
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static driver_t ure_driver = {
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.name = "ure",
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.methods = ure_methods,
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.size = sizeof(struct ure_softc),
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};
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static devclass_t ure_devclass;
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DRIVER_MODULE(ure, uhub, ure_driver, ure_devclass, NULL, NULL);
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DRIVER_MODULE(miibus, ure, miibus_driver, miibus_devclass, NULL, NULL);
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MODULE_DEPEND(ure, uether, 1, 1, 1);
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MODULE_DEPEND(ure, usb, 1, 1, 1);
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MODULE_DEPEND(ure, ether, 1, 1, 1);
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MODULE_DEPEND(ure, miibus, 1, 1, 1);
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MODULE_VERSION(ure, 1);
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static const struct usb_ether_methods ure_ue_methods = {
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.ue_attach_post = ure_attach_post,
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.ue_attach_post_sub = ure_attach_post_sub,
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.ue_start = ure_start,
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.ue_init = ure_init,
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.ue_stop = ure_stop,
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.ue_tick = ure_tick,
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.ue_setmulti = ure_setmulti,
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.ue_setpromisc = ure_setpromisc,
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.ue_mii_upd = ure_ifmedia_upd,
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.ue_mii_sts = ure_ifmedia_sts,
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};
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static int
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ure_ctl(struct ure_softc *sc, uint8_t rw, uint16_t val, uint16_t index,
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void *buf, int len)
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{
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struct usb_device_request req;
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URE_LOCK_ASSERT(sc, MA_OWNED);
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if (rw == URE_CTL_WRITE)
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req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
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else
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req.bmRequestType = UT_READ_VENDOR_DEVICE;
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req.bRequest = UR_SET_ADDRESS;
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USETW(req.wValue, val);
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USETW(req.wIndex, index);
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USETW(req.wLength, len);
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return (uether_do_request(&sc->sc_ue, &req, buf, 1000));
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}
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static int
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ure_read_mem(struct ure_softc *sc, uint16_t addr, uint16_t index,
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void *buf, int len)
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{
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return (ure_ctl(sc, URE_CTL_READ, addr, index, buf, len));
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}
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static int
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ure_write_mem(struct ure_softc *sc, uint16_t addr, uint16_t index,
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void *buf, int len)
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{
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return (ure_ctl(sc, URE_CTL_WRITE, addr, index, buf, len));
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}
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static uint8_t
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ure_read_1(struct ure_softc *sc, uint16_t reg, uint16_t index)
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{
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uint32_t val;
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uint8_t temp[4];
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uint8_t shift;
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shift = (reg & 3) << 3;
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reg &= ~3;
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ure_read_mem(sc, reg, index, &temp, 4);
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val = UGETDW(temp);
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val >>= shift;
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return (val & 0xff);
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}
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static uint16_t
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ure_read_2(struct ure_softc *sc, uint16_t reg, uint16_t index)
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{
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uint32_t val;
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uint8_t temp[4];
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uint8_t shift;
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shift = (reg & 2) << 3;
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reg &= ~3;
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ure_read_mem(sc, reg, index, &temp, 4);
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val = UGETDW(temp);
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val >>= shift;
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return (val & 0xffff);
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}
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static uint32_t
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ure_read_4(struct ure_softc *sc, uint16_t reg, uint16_t index)
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{
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uint8_t temp[4];
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ure_read_mem(sc, reg, index, &temp, 4);
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return (UGETDW(temp));
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}
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static int
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ure_write_1(struct ure_softc *sc, uint16_t reg, uint16_t index, uint32_t val)
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{
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uint16_t byen;
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uint8_t temp[4];
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uint8_t shift;
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byen = URE_BYTE_EN_BYTE;
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shift = reg & 3;
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val &= 0xff;
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if (reg & 3) {
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byen <<= shift;
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val <<= (shift << 3);
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reg &= ~3;
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}
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USETDW(temp, val);
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return (ure_write_mem(sc, reg, index | byen, &temp, 4));
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}
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static int
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ure_write_2(struct ure_softc *sc, uint16_t reg, uint16_t index, uint32_t val)
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{
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uint16_t byen;
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uint8_t temp[4];
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uint8_t shift;
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byen = URE_BYTE_EN_WORD;
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shift = reg & 2;
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val &= 0xffff;
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if (reg & 2) {
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byen <<= shift;
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val <<= (shift << 3);
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reg &= ~3;
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}
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USETDW(temp, val);
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return (ure_write_mem(sc, reg, index | byen, &temp, 4));
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}
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static int
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ure_write_4(struct ure_softc *sc, uint16_t reg, uint16_t index, uint32_t val)
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{
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uint8_t temp[4];
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USETDW(temp, val);
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return (ure_write_mem(sc, reg, index | URE_BYTE_EN_DWORD, &temp, 4));
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}
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static uint16_t
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ure_ocp_reg_read(struct ure_softc *sc, uint16_t addr)
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{
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uint16_t reg;
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ure_write_2(sc, URE_PLA_OCP_GPHY_BASE, URE_MCU_TYPE_PLA, addr & 0xf000);
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reg = (addr & 0x0fff) | 0xb000;
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return (ure_read_2(sc, reg, URE_MCU_TYPE_PLA));
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}
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static void
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ure_ocp_reg_write(struct ure_softc *sc, uint16_t addr, uint16_t data)
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{
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uint16_t reg;
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ure_write_2(sc, URE_PLA_OCP_GPHY_BASE, URE_MCU_TYPE_PLA, addr & 0xf000);
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reg = (addr & 0x0fff) | 0xb000;
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ure_write_2(sc, reg, URE_MCU_TYPE_PLA, data);
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}
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static int
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ure_miibus_readreg(device_t dev, int phy, int reg)
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{
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struct ure_softc *sc;
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uint16_t val;
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int locked;
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sc = device_get_softc(dev);
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locked = mtx_owned(&sc->sc_mtx);
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if (!locked)
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URE_LOCK(sc);
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val = ure_ocp_reg_read(sc, URE_OCP_BASE_MII + reg * 2);
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if (!locked)
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URE_UNLOCK(sc);
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return (val);
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}
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static int
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ure_miibus_writereg(device_t dev, int phy, int reg, int val)
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{
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struct ure_softc *sc;
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int locked;
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sc = device_get_softc(dev);
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if (sc->sc_phyno != phy)
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return (0);
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locked = mtx_owned(&sc->sc_mtx);
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if (!locked)
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URE_LOCK(sc);
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ure_ocp_reg_write(sc, URE_OCP_BASE_MII + reg * 2, val);
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if (!locked)
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URE_UNLOCK(sc);
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return (0);
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}
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static void
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ure_miibus_statchg(device_t dev)
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{
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struct ure_softc *sc;
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struct mii_data *mii;
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struct ifnet *ifp;
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int locked;
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sc = device_get_softc(dev);
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mii = GET_MII(sc);
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locked = mtx_owned(&sc->sc_mtx);
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if (!locked)
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URE_LOCK(sc);
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ifp = uether_getifp(&sc->sc_ue);
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if (mii == NULL || ifp == NULL ||
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(ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
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goto done;
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sc->sc_flags &= ~URE_FLAG_LINK;
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if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) ==
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(IFM_ACTIVE | IFM_AVALID)) {
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switch (IFM_SUBTYPE(mii->mii_media_active)) {
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case IFM_10_T:
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case IFM_100_TX:
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sc->sc_flags |= URE_FLAG_LINK;
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break;
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default:
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break;
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}
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}
|
|
|
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/* Lost link, do nothing. */
|
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if ((sc->sc_flags & URE_FLAG_LINK) == 0)
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goto done;
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done:
|
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if (!locked)
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URE_UNLOCK(sc);
|
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}
|
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|
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/*
|
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* Probe for a RTL8152 chip.
|
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*/
|
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static int
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ure_probe(device_t dev)
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{
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struct usb_attach_arg *uaa;
|
|
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uaa = device_get_ivars(dev);;
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if (uaa->usb_mode != USB_MODE_HOST)
|
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return (ENXIO);
|
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if (uaa->info.bConfigIndex != URE_CONFIG_IDX)
|
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return (ENXIO);
|
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if (uaa->info.bIfaceIndex != URE_IFACE_IDX)
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return (ENXIO);
|
|
|
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return (usbd_lookup_id_by_uaa(ure_devs, sizeof(ure_devs), uaa));
|
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}
|
|
|
|
/*
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* Attach the interface. Allocate softc structures, do ifmedia
|
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* setup and ethernet/BPF attach.
|
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*/
|
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static int
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ure_attach(device_t dev)
|
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{
|
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struct usb_attach_arg *uaa = device_get_ivars(dev);
|
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struct ure_softc *sc = device_get_softc(dev);
|
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struct usb_ether *ue = &sc->sc_ue;
|
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uint8_t iface_index;
|
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int error;
|
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|
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device_set_usb_desc(dev);
|
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mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF);
|
|
|
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iface_index = URE_IFACE_IDX;
|
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error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer,
|
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ure_config, URE_N_TRANSFER, sc, &sc->sc_mtx);
|
|
if (error != 0) {
|
|
device_printf(dev, "allocating USB transfers failed\n");
|
|
goto detach;
|
|
}
|
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|
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ue->ue_sc = sc;
|
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ue->ue_dev = dev;
|
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ue->ue_udev = uaa->device;
|
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ue->ue_mtx = &sc->sc_mtx;
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ue->ue_methods = &ure_ue_methods;
|
|
|
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error = uether_ifattach(ue);
|
|
if (error != 0) {
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device_printf(dev, "could not attach interface\n");
|
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goto detach;
|
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}
|
|
return (0); /* success */
|
|
|
|
detach:
|
|
ure_detach(dev);
|
|
return (ENXIO); /* failure */
|
|
}
|
|
|
|
static int
|
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ure_detach(device_t dev)
|
|
{
|
|
struct ure_softc *sc = device_get_softc(dev);
|
|
struct usb_ether *ue = &sc->sc_ue;
|
|
|
|
usbd_transfer_unsetup(sc->sc_xfer, URE_N_TRANSFER);
|
|
uether_ifdetach(ue);
|
|
mtx_destroy(&sc->sc_mtx);
|
|
|
|
return (0);
|
|
}
|
|
|
|
static void
|
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ure_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error)
|
|
{
|
|
struct ure_softc *sc = usbd_xfer_softc(xfer);
|
|
struct usb_ether *ue = &sc->sc_ue;
|
|
struct ifnet *ifp = uether_getifp(ue);
|
|
struct usb_page_cache *pc;
|
|
struct ure_rxpkt pkt;
|
|
int actlen, len;
|
|
|
|
usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
|
|
|
|
switch (USB_GET_STATE(xfer)) {
|
|
case USB_ST_TRANSFERRED:
|
|
if (actlen < (int)(sizeof(pkt))) {
|
|
if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
|
|
goto tr_setup;
|
|
}
|
|
pc = usbd_xfer_get_frame(xfer, 0);
|
|
usbd_copy_out(pc, 0, &pkt, sizeof(pkt));
|
|
len = le32toh(pkt.ure_pktlen) & URE_RXPKT_LEN_MASK;
|
|
len -= ETHER_CRC_LEN;
|
|
if (actlen < (int)(len + sizeof(pkt))) {
|
|
if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
|
|
goto tr_setup;
|
|
}
|
|
|
|
uether_rxbuf(ue, pc, sizeof(pkt), len);
|
|
/* FALLTHROUGH */
|
|
case USB_ST_SETUP:
|
|
tr_setup:
|
|
usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
|
|
usbd_transfer_submit(xfer);
|
|
uether_rxflush(ue);
|
|
return;
|
|
|
|
default: /* Error */
|
|
DPRINTF("bulk read error, %s\n",
|
|
usbd_errstr(error));
|
|
|
|
if (error != USB_ERR_CANCELLED) {
|
|
/* try to clear stall first */
|
|
usbd_xfer_set_stall(xfer);
|
|
goto tr_setup;
|
|
}
|
|
return;
|
|
}
|
|
}
|
|
|
|
static void
|
|
ure_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error)
|
|
{
|
|
struct ure_softc *sc = usbd_xfer_softc(xfer);
|
|
struct ifnet *ifp = uether_getifp(&sc->sc_ue);
|
|
struct usb_page_cache *pc;
|
|
struct mbuf *m;
|
|
struct ure_txpkt txpkt;
|
|
int len, pos;
|
|
|
|
switch (USB_GET_STATE(xfer)) {
|
|
case USB_ST_TRANSFERRED:
|
|
DPRINTFN(11, "transfer complete\n");
|
|
ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
|
|
/* FALLTHROUGH */
|
|
case USB_ST_SETUP:
|
|
tr_setup:
|
|
if ((sc->sc_flags & URE_FLAG_LINK) == 0 ||
|
|
(ifp->if_drv_flags & IFF_DRV_OACTIVE) != 0) {
|
|
/*
|
|
* don't send anything if there is no link !
|
|
*/
|
|
return;
|
|
}
|
|
IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
|
|
if (m == NULL)
|
|
break;
|
|
pos = 0;
|
|
len = m->m_pkthdr.len;
|
|
pc = usbd_xfer_get_frame(xfer, 0);
|
|
memset(&txpkt, 0, sizeof(txpkt));
|
|
txpkt.ure_pktlen = htole32((len & URE_TXPKT_LEN_MASK) |
|
|
URE_TKPKT_TX_FS | URE_TKPKT_TX_LS);
|
|
usbd_copy_in(pc, pos, &txpkt, sizeof(txpkt));
|
|
pos += sizeof(txpkt);
|
|
usbd_m_copy_in(pc, pos, m, 0, m->m_pkthdr.len);
|
|
pos += m->m_pkthdr.len;
|
|
|
|
if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1);
|
|
|
|
/*
|
|
* If there's a BPF listener, bounce a copy
|
|
* of this frame to him.
|
|
*/
|
|
BPF_MTAP(ifp, m);
|
|
|
|
m_freem(m);
|
|
|
|
/* Set frame length. */
|
|
usbd_xfer_set_frame_len(xfer, 0, pos);
|
|
|
|
usbd_transfer_submit(xfer);
|
|
ifp->if_drv_flags |= IFF_DRV_OACTIVE;
|
|
return;
|
|
default: /* Error */
|
|
DPRINTFN(11, "transfer error, %s\n",
|
|
usbd_errstr(error));
|
|
|
|
if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
|
|
ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
|
|
|
|
if (error != USB_ERR_CANCELLED) {
|
|
/* try to clear stall first */
|
|
usbd_xfer_set_stall(xfer);
|
|
goto tr_setup;
|
|
}
|
|
return;
|
|
}
|
|
}
|
|
|
|
static void
|
|
ure_read_chipver(struct ure_softc *sc)
|
|
{
|
|
uint16_t ver;
|
|
|
|
ver = ure_read_2(sc, URE_PLA_TCR1, URE_MCU_TYPE_PLA) & URE_VERSION_MASK;
|
|
switch (ver) {
|
|
case 0x4c00:
|
|
sc->sc_chip |= URE_CHIP_VER_4C00;
|
|
break;
|
|
case 0x4c10:
|
|
sc->sc_chip |= URE_CHIP_VER_4C10;
|
|
break;
|
|
default:
|
|
device_printf(sc->sc_ue.ue_dev,
|
|
"unknown version 0x%04x\n", ver);
|
|
break;
|
|
}
|
|
}
|
|
|
|
static void
|
|
ure_attach_post(struct usb_ether *ue)
|
|
{
|
|
struct ure_softc *sc = uether_getsc(ue);
|
|
|
|
sc->sc_phyno = 0;
|
|
|
|
/* Determine the chip version. */
|
|
ure_read_chipver(sc);
|
|
|
|
/* Initialize controller and get station address. */
|
|
ure_rtl8152_init(sc);
|
|
|
|
if (sc->sc_chip & URE_CHIP_VER_4C00)
|
|
ure_read_mem(sc, URE_PLA_IDR, URE_MCU_TYPE_PLA,
|
|
ue->ue_eaddr, 8);
|
|
else
|
|
ure_read_mem(sc, URE_PLA_BACKUP, URE_MCU_TYPE_PLA,
|
|
ue->ue_eaddr, 8);
|
|
}
|
|
|
|
static int
|
|
ure_attach_post_sub(struct usb_ether *ue)
|
|
{
|
|
struct ure_softc *sc;
|
|
struct ifnet *ifp;
|
|
int error;
|
|
|
|
sc = uether_getsc(ue);
|
|
ifp = ue->ue_ifp;
|
|
ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
|
|
ifp->if_start = uether_start;
|
|
ifp->if_ioctl = ure_ioctl;
|
|
ifp->if_init = uether_init;
|
|
IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
|
|
ifp->if_snd.ifq_drv_maxlen = ifqmaxlen;
|
|
IFQ_SET_READY(&ifp->if_snd);
|
|
|
|
mtx_lock(&Giant);
|
|
error = mii_attach(ue->ue_dev, &ue->ue_miibus, ifp,
|
|
uether_ifmedia_upd, ue->ue_methods->ue_mii_sts,
|
|
BMSR_DEFCAPMASK, sc->sc_phyno, MII_OFFSET_ANY, 0);
|
|
mtx_unlock(&Giant);
|
|
|
|
return (error);
|
|
}
|
|
|
|
static void
|
|
ure_init(struct usb_ether *ue)
|
|
{
|
|
struct ure_softc *sc = uether_getsc(ue);
|
|
struct ifnet *ifp = uether_getifp(ue);
|
|
uint32_t rxmode;
|
|
|
|
URE_LOCK_ASSERT(sc, MA_OWNED);
|
|
|
|
if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0)
|
|
return;
|
|
|
|
/* Cancel pending I/O. */
|
|
ure_stop(ue);
|
|
|
|
ure_reset(sc);
|
|
|
|
/* Set MAC address. */
|
|
ure_write_mem(sc, URE_PLA_IDR, URE_MCU_TYPE_PLA | URE_BYTE_EN_SIX_BYTES,
|
|
IF_LLADDR(ifp), 8);
|
|
|
|
/* Reset the packet filter. */
|
|
ure_write_2(sc, URE_PLA_FMC, URE_MCU_TYPE_PLA,
|
|
ure_read_2(sc, URE_PLA_FMC, URE_MCU_TYPE_PLA) &
|
|
~URE_FMC_FCR_MCU_EN);
|
|
ure_write_2(sc, URE_PLA_FMC, URE_MCU_TYPE_PLA,
|
|
ure_read_2(sc, URE_PLA_FMC, URE_MCU_TYPE_PLA) |
|
|
URE_FMC_FCR_MCU_EN);
|
|
|
|
/* Enable transmit and receive. */
|
|
ure_write_1(sc, URE_PLA_CR, URE_MCU_TYPE_PLA,
|
|
ure_read_1(sc, URE_PLA_CR, URE_MCU_TYPE_PLA) | URE_CR_RE |
|
|
URE_CR_TE);
|
|
|
|
ure_write_2(sc, URE_PLA_MISC_1, URE_MCU_TYPE_PLA,
|
|
ure_read_2(sc, URE_PLA_MISC_1, URE_MCU_TYPE_PLA) &
|
|
~URE_RXDY_GATED_EN);
|
|
|
|
/* Set Rx mode. */
|
|
rxmode = URE_RCR_APM;
|
|
|
|
/* If we want promiscuous mode, set the allframes bit. */
|
|
if (ifp->if_flags & IFF_PROMISC)
|
|
rxmode |= URE_RCR_AAP;
|
|
|
|
if (ifp->if_flags & IFF_BROADCAST)
|
|
rxmode |= URE_RCR_AB;
|
|
|
|
ure_write_4(sc, URE_PLA_RCR, URE_MCU_TYPE_PLA, rxmode);
|
|
|
|
/* Load the multicast filter. */
|
|
ure_setmulti(ue);
|
|
|
|
usbd_xfer_set_stall(sc->sc_xfer[URE_BULK_DT_WR]);
|
|
|
|
/* Indicate we are up and running. */
|
|
ifp->if_drv_flags |= IFF_DRV_RUNNING;
|
|
|
|
/* Switch to selected media. */
|
|
ure_ifmedia_upd(ifp);
|
|
}
|
|
|
|
static void
|
|
ure_tick(struct usb_ether *ue)
|
|
{
|
|
struct ure_softc *sc = uether_getsc(ue);
|
|
struct mii_data *mii = GET_MII(sc);
|
|
|
|
URE_LOCK_ASSERT(sc, MA_OWNED);
|
|
|
|
mii_tick(mii);
|
|
if ((sc->sc_flags & URE_FLAG_LINK) == 0
|
|
&& mii->mii_media_status & IFM_ACTIVE &&
|
|
IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) {
|
|
sc->sc_flags |= URE_FLAG_LINK;
|
|
ure_start(ue);
|
|
}
|
|
}
|
|
|
|
static void
|
|
ure_setpromisc(struct usb_ether *ue)
|
|
{
|
|
struct ure_softc *sc = uether_getsc(ue);
|
|
struct ifnet *ifp = uether_getifp(ue);
|
|
uint32_t rxmode;
|
|
|
|
rxmode = ure_read_4(sc, URE_PLA_RCR, URE_MCU_TYPE_PLA);
|
|
|
|
if (ifp->if_flags & IFF_PROMISC)
|
|
rxmode |= URE_RCR_AAP;
|
|
else
|
|
rxmode &= ~URE_RCR_AAP;
|
|
|
|
ure_write_4(sc, URE_PLA_RCR, URE_MCU_TYPE_PLA, rxmode);
|
|
|
|
ure_setmulti(ue);
|
|
}
|
|
|
|
/*
|
|
* Program the 64-bit multicast hash filter.
|
|
*/
|
|
static void
|
|
ure_setmulti(struct usb_ether *ue)
|
|
{
|
|
struct ure_softc *sc = uether_getsc(ue);
|
|
struct ifnet *ifp = uether_getifp(ue);
|
|
struct ifmultiaddr *ifma;
|
|
uint32_t h, rxmode;
|
|
uint32_t hashes[2] = { 0, 0 };
|
|
|
|
URE_LOCK_ASSERT(sc, MA_OWNED);
|
|
|
|
rxmode = ure_read_4(sc, URE_PLA_RCR, URE_MCU_TYPE_PLA);
|
|
if (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC)) {
|
|
if (ifp->if_flags & IFF_PROMISC)
|
|
rxmode |= URE_RCR_AAP;
|
|
rxmode |= URE_RCR_AM;
|
|
hashes[0] = hashes[1] = 0xffffffff;
|
|
goto done;
|
|
}
|
|
|
|
if_maddr_rlock(ifp);
|
|
TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
|
|
if (ifma->ifma_addr->sa_family != AF_LINK)
|
|
continue;
|
|
h = ether_crc32_be(LLADDR((struct sockaddr_dl *)
|
|
ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
|
|
if (h < 32)
|
|
hashes[0] |= (1 << h);
|
|
else
|
|
hashes[1] |= (1 << (h - 32));
|
|
}
|
|
if_maddr_runlock(ifp);
|
|
|
|
h = bswap32(hashes[0]);
|
|
hashes[0] = bswap32(hashes[1]);
|
|
hashes[1] = h;
|
|
rxmode |= URE_RCR_AM;
|
|
|
|
done:
|
|
ure_write_4(sc, URE_PLA_MAR0, URE_MCU_TYPE_PLA, hashes[0]);
|
|
ure_write_4(sc, URE_PLA_MAR4, URE_MCU_TYPE_PLA, hashes[1]);
|
|
ure_write_4(sc, URE_PLA_RCR, URE_MCU_TYPE_PLA, rxmode);
|
|
}
|
|
|
|
static void
|
|
ure_start(struct usb_ether *ue)
|
|
{
|
|
struct ure_softc *sc = uether_getsc(ue);
|
|
|
|
/*
|
|
* start the USB transfers, if not already started:
|
|
*/
|
|
usbd_transfer_start(sc->sc_xfer[URE_BULK_DT_RD]);
|
|
usbd_transfer_start(sc->sc_xfer[URE_BULK_DT_WR]);
|
|
}
|
|
|
|
static void
|
|
ure_reset(struct ure_softc *sc)
|
|
{
|
|
int i;
|
|
|
|
ure_write_1(sc, URE_PLA_CR, URE_MCU_TYPE_PLA, URE_CR_RST);
|
|
|
|
for (i = 0; i < URE_TIMEOUT; i++) {
|
|
if (!(ure_read_1(sc, URE_PLA_CR, URE_MCU_TYPE_PLA) &
|
|
URE_CR_RST))
|
|
break;
|
|
uether_pause(&sc->sc_ue, hz / 100);
|
|
}
|
|
if (i == URE_TIMEOUT)
|
|
device_printf(sc->sc_ue.ue_dev, "reset never completed\n");
|
|
}
|
|
|
|
/*
|
|
* Set media options.
|
|
*/
|
|
static int
|
|
ure_ifmedia_upd(struct ifnet *ifp)
|
|
{
|
|
struct ure_softc *sc = ifp->if_softc;
|
|
struct mii_data *mii = GET_MII(sc);
|
|
struct mii_softc *miisc;
|
|
int error;
|
|
|
|
URE_LOCK_ASSERT(sc, MA_OWNED);
|
|
|
|
LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
|
|
PHY_RESET(miisc);
|
|
error = mii_mediachg(mii);
|
|
return (error);
|
|
}
|
|
|
|
/*
|
|
* Report current media status.
|
|
*/
|
|
static void
|
|
ure_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
|
|
{
|
|
struct ure_softc *sc;
|
|
struct mii_data *mii;
|
|
|
|
sc = ifp->if_softc;
|
|
mii = GET_MII(sc);
|
|
|
|
URE_LOCK(sc);
|
|
mii_pollstat(mii);
|
|
ifmr->ifm_active = mii->mii_media_active;
|
|
ifmr->ifm_status = mii->mii_media_status;
|
|
URE_UNLOCK(sc);
|
|
}
|
|
|
|
static int
|
|
ure_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
|
|
{
|
|
struct usb_ether *ue = ifp->if_softc;
|
|
struct ure_softc *sc;
|
|
struct ifreq *ifr;
|
|
int error, mask, reinit;
|
|
|
|
sc = uether_getsc(ue);
|
|
ifr = (struct ifreq *)data;
|
|
error = 0;
|
|
reinit = 0;
|
|
if (cmd == SIOCSIFCAP) {
|
|
URE_LOCK(sc);
|
|
mask = ifr->ifr_reqcap ^ ifp->if_capenable;
|
|
if (reinit > 0 && ifp->if_drv_flags & IFF_DRV_RUNNING)
|
|
ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
|
|
else
|
|
reinit = 0;
|
|
URE_UNLOCK(sc);
|
|
if (reinit > 0)
|
|
uether_init(ue);
|
|
} else
|
|
error = uether_ioctl(ifp, cmd, data);
|
|
|
|
return (error);
|
|
}
|
|
|
|
static void
|
|
ure_rtl8152_init(struct ure_softc *sc)
|
|
{
|
|
uint32_t pwrctrl;
|
|
|
|
/* Disable ALDPS. */
|
|
ure_ocp_reg_write(sc, URE_OCP_ALDPS_CONFIG, URE_ENPDNPS | URE_LINKENA |
|
|
URE_DIS_SDSAVE);
|
|
uether_pause(&sc->sc_ue, hz / 50);
|
|
|
|
if (sc->sc_chip & URE_CHIP_VER_4C00) {
|
|
ure_write_2(sc, URE_PLA_LED_FEATURE, URE_MCU_TYPE_PLA,
|
|
ure_read_2(sc, URE_PLA_LED_FEATURE, URE_MCU_TYPE_PLA) &
|
|
~URE_LED_MODE_MASK);
|
|
}
|
|
|
|
ure_write_2(sc, URE_USB_UPS_CTRL, URE_MCU_TYPE_USB,
|
|
ure_read_2(sc, URE_USB_UPS_CTRL, URE_MCU_TYPE_USB) &
|
|
~URE_POWER_CUT);
|
|
ure_write_2(sc, URE_USB_PM_CTRL_STATUS, URE_MCU_TYPE_USB,
|
|
ure_read_2(sc, URE_USB_PM_CTRL_STATUS, URE_MCU_TYPE_USB) &
|
|
~URE_RESUME_INDICATE);
|
|
|
|
ure_write_2(sc, URE_PLA_PHY_PWR, URE_MCU_TYPE_PLA,
|
|
ure_read_2(sc, URE_PLA_PHY_PWR, URE_MCU_TYPE_PLA) |
|
|
URE_TX_10M_IDLE_EN | URE_PFM_PWM_SWITCH);
|
|
pwrctrl = ure_read_4(sc, URE_PLA_MAC_PWR_CTRL, URE_MCU_TYPE_PLA);
|
|
pwrctrl &= ~URE_MCU_CLK_RATIO_MASK;
|
|
pwrctrl |= URE_MCU_CLK_RATIO | URE_D3_CLK_GATED_EN;
|
|
ure_write_4(sc, URE_PLA_MAC_PWR_CTRL, URE_MCU_TYPE_PLA, pwrctrl);
|
|
ure_write_2(sc, URE_PLA_GPHY_INTR_IMR, URE_MCU_TYPE_PLA,
|
|
URE_GPHY_STS_MSK | URE_SPEED_DOWN_MSK | URE_SPDWN_RXDV_MSK |
|
|
URE_SPDWN_LINKCHG_MSK);
|
|
|
|
/* Disable Rx aggregation. */
|
|
ure_write_2(sc, URE_USB_USB_CTRL, URE_MCU_TYPE_USB,
|
|
ure_read_2(sc, URE_USB_USB_CTRL, URE_MCU_TYPE_USB) |
|
|
URE_RX_AGG_DISABLE);
|
|
|
|
/* Disable ALDPS. */
|
|
ure_ocp_reg_write(sc, URE_OCP_ALDPS_CONFIG, URE_ENPDNPS | URE_LINKENA |
|
|
URE_DIS_SDSAVE);
|
|
uether_pause(&sc->sc_ue, hz / 50);
|
|
|
|
ure_init_fifo(sc);
|
|
|
|
ure_write_1(sc, URE_USB_TX_AGG, URE_MCU_TYPE_USB,
|
|
URE_TX_AGG_MAX_THRESHOLD);
|
|
ure_write_4(sc, URE_USB_RX_BUF_TH, URE_MCU_TYPE_USB, URE_RX_THR_HIGH);
|
|
ure_write_4(sc, URE_USB_TX_DMA, URE_MCU_TYPE_USB,
|
|
URE_TEST_MODE_DISABLE | URE_TX_SIZE_ADJUST1);
|
|
}
|
|
|
|
static void
|
|
ure_stop(struct usb_ether *ue)
|
|
{
|
|
struct ure_softc *sc = uether_getsc(ue);
|
|
struct ifnet *ifp = uether_getifp(ue);
|
|
|
|
URE_LOCK_ASSERT(sc, MA_OWNED);
|
|
|
|
ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
|
|
sc->sc_flags &= ~URE_FLAG_LINK;
|
|
|
|
/*
|
|
* stop all the transfers, if not already stopped:
|
|
*/
|
|
usbd_transfer_stop(sc->sc_xfer[URE_BULK_DT_WR]);
|
|
usbd_transfer_stop(sc->sc_xfer[URE_BULK_DT_RD]);
|
|
}
|
|
|
|
static void
|
|
ure_disable_teredo(struct ure_softc *sc)
|
|
{
|
|
|
|
ure_write_4(sc, URE_PLA_TEREDO_CFG, URE_MCU_TYPE_PLA,
|
|
ure_read_4(sc, URE_PLA_TEREDO_CFG, URE_MCU_TYPE_PLA) &
|
|
~(URE_TEREDO_SEL | URE_TEREDO_RS_EVENT_MASK | URE_OOB_TEREDO_EN));
|
|
ure_write_2(sc, URE_PLA_WDT6_CTRL, URE_MCU_TYPE_PLA,
|
|
URE_WDT6_SET_MODE);
|
|
ure_write_2(sc, URE_PLA_REALWOW_TIMER, URE_MCU_TYPE_PLA, 0);
|
|
ure_write_4(sc, URE_PLA_TEREDO_TIMER, URE_MCU_TYPE_PLA, 0);
|
|
}
|
|
|
|
static void
|
|
ure_init_fifo(struct ure_softc *sc)
|
|
{
|
|
uint32_t rx_fifo1, rx_fifo2;
|
|
int i;
|
|
|
|
ure_write_2(sc, URE_PLA_MISC_1, URE_MCU_TYPE_PLA,
|
|
ure_read_2(sc, URE_PLA_MISC_1, URE_MCU_TYPE_PLA) |
|
|
URE_RXDY_GATED_EN);
|
|
|
|
ure_disable_teredo(sc);
|
|
|
|
ure_write_4(sc, URE_PLA_RCR, URE_MCU_TYPE_PLA,
|
|
ure_read_4(sc, URE_PLA_RCR, URE_MCU_TYPE_PLA) &
|
|
~URE_RCR_ACPT_ALL);
|
|
|
|
ure_reset(sc);
|
|
|
|
ure_write_1(sc, URE_PLA_CR, URE_MCU_TYPE_PLA, 0);
|
|
|
|
ure_write_1(sc, URE_PLA_OOB_CTRL, URE_MCU_TYPE_PLA,
|
|
ure_read_1(sc, URE_PLA_OOB_CTRL, URE_MCU_TYPE_PLA) &
|
|
~URE_NOW_IS_OOB);
|
|
|
|
ure_write_2(sc, URE_PLA_SFF_STS_7, URE_MCU_TYPE_PLA,
|
|
ure_read_2(sc, URE_PLA_SFF_STS_7, URE_MCU_TYPE_PLA) &
|
|
~URE_MCU_BORW_EN);
|
|
for (i = 0; i < URE_TIMEOUT; i++) {
|
|
if (ure_read_1(sc, URE_PLA_OOB_CTRL, URE_MCU_TYPE_PLA) &
|
|
URE_LINK_LIST_READY)
|
|
break;
|
|
uether_pause(&sc->sc_ue, hz / 100);
|
|
}
|
|
if (i == URE_TIMEOUT)
|
|
device_printf(sc->sc_ue.ue_dev,
|
|
"timeout waiting for OOB control\n");
|
|
ure_write_2(sc, URE_PLA_SFF_STS_7, URE_MCU_TYPE_PLA,
|
|
ure_read_2(sc, URE_PLA_SFF_STS_7, URE_MCU_TYPE_PLA) |
|
|
URE_RE_INIT_LL);
|
|
for (i = 0; i < URE_TIMEOUT; i++) {
|
|
if (ure_read_1(sc, URE_PLA_OOB_CTRL, URE_MCU_TYPE_PLA) &
|
|
URE_LINK_LIST_READY)
|
|
break;
|
|
uether_pause(&sc->sc_ue, hz / 100);
|
|
}
|
|
if (i == URE_TIMEOUT)
|
|
device_printf(sc->sc_ue.ue_dev,
|
|
"timeout waiting for OOB control\n");
|
|
|
|
ure_write_2(sc, URE_PLA_CPCR, URE_MCU_TYPE_PLA,
|
|
ure_read_2(sc, URE_PLA_CPCR, URE_MCU_TYPE_PLA) &
|
|
~URE_CPCR_RX_VLAN);
|
|
ure_write_2(sc, URE_PLA_TCR0, URE_MCU_TYPE_PLA,
|
|
ure_read_2(sc, URE_PLA_TCR0, URE_MCU_TYPE_PLA) |
|
|
URE_TCR0_AUTO_FIFO);
|
|
|
|
/* Configure Rx FIFO threshold. */
|
|
ure_write_4(sc, URE_PLA_RXFIFO_CTRL0, URE_MCU_TYPE_PLA,
|
|
URE_RXFIFO_THR1_NORMAL);
|
|
if (usbd_get_speed(sc->sc_ue.ue_udev) == USB_SPEED_FULL) {
|
|
rx_fifo1 = URE_RXFIFO_THR2_FULL;
|
|
rx_fifo2 = URE_RXFIFO_THR3_FULL;
|
|
} else {
|
|
rx_fifo1 = URE_RXFIFO_THR2_HIGH;
|
|
rx_fifo2 = URE_RXFIFO_THR3_HIGH;
|
|
}
|
|
ure_write_4(sc, URE_PLA_RXFIFO_CTRL1, URE_MCU_TYPE_PLA, rx_fifo1);
|
|
ure_write_4(sc, URE_PLA_RXFIFO_CTRL2, URE_MCU_TYPE_PLA, rx_fifo2);
|
|
|
|
/* Configure Tx FIFO threshold. */
|
|
ure_write_4(sc, URE_PLA_TXFIFO_CTRL, URE_MCU_TYPE_PLA,
|
|
URE_TXFIFO_THR_NORMAL);
|
|
}
|