f7925608a5
The _Alignas specifier must come before the declaration and not after. It works if _Alignas() expands to __attribute__(aligned(x)) which was the only case I tested before. Approved By: jhb (mentor)
578 lines
14 KiB
C
578 lines
14 KiB
C
/* $OpenBSD: machdep.c,v 1.33 1998/09/15 10:58:54 pefo Exp $ */
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/* tracked to 1.38 */
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/*-
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* SPDX-License-Identifier: BSD-3-Clause
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*
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* Copyright (c) 1988 University of Utah.
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* Copyright (c) 1992, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* the Systems Programming Group of the University of Utah Computer
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* Science Department, The Mach Operating System project at
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* Carnegie-Mellon University and Ralph Campbell.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: @(#)machdep.c 8.3 (Berkeley) 1/12/94
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* Id: machdep.c,v 1.33 1998/09/15 10:58:54 pefo Exp
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* JNPR: machdep.c,v 1.11.2.3 2007/08/29 12:24:49
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_ddb.h"
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#include "opt_md.h"
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#include <sys/param.h>
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#include <sys/proc.h>
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#include <sys/systm.h>
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#include <sys/buf.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/cpu.h>
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#include <sys/kernel.h>
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#include <sys/linker.h>
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#include <sys/malloc.h>
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#include <sys/mbuf.h>
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#include <sys/msgbuf.h>
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#include <sys/reboot.h>
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#include <sys/rwlock.h>
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#include <sys/sched.h>
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#include <sys/sysctl.h>
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#include <sys/sysproto.h>
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#include <sys/vmmeter.h>
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#include <vm/vm.h>
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#include <vm/vm_kern.h>
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#include <vm/vm_object.h>
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#include <vm/vm_page.h>
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#include <vm/pmap.h>
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#include <vm/vm_map.h>
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#include <vm/vm_pager.h>
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#include <vm/vm_extern.h>
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#include <sys/socket.h>
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#include <sys/user.h>
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#include <sys/interrupt.h>
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#include <sys/cons.h>
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#include <sys/syslog.h>
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#include <machine/asm.h>
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#include <machine/bootinfo.h>
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#include <machine/cache.h>
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#include <machine/clock.h>
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#include <machine/cpu.h>
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#include <machine/cpuregs.h>
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#include <machine/elf.h>
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#include <machine/hwfunc.h>
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#include <machine/intr_machdep.h>
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#include <machine/md_var.h>
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#include <machine/tlb.h>
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#ifdef DDB
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#include <sys/kdb.h>
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#include <ddb/ddb.h>
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#endif
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#include <sys/random.h>
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#include <net/if.h>
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#define BOOTINFO_DEBUG 0
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char machine[] = "mips";
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SYSCTL_STRING(_hw, HW_MACHINE, machine, CTLFLAG_RD, machine, 0, "Machine class");
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char cpu_model[80];
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SYSCTL_STRING(_hw, HW_MODEL, model, CTLFLAG_RD, cpu_model, 0, "Machine model");
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char cpu_board[80];
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SYSCTL_STRING(_hw, OID_AUTO, board, CTLFLAG_RD, cpu_board, 0, "Machine board");
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int cold = 1;
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long realmem = 0;
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long Maxmem = 0;
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int cpu_clock = MIPS_DEFAULT_HZ;
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SYSCTL_INT(_hw, OID_AUTO, clockrate, CTLFLAG_RD,
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&cpu_clock, 0, "CPU instruction clock rate");
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int clocks_running = 0;
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vm_offset_t kstack0;
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/*
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* Each entry in the pcpu_space[] array is laid out in the following manner:
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* struct pcpu for cpu 'n' pcpu_space[n]
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* boot stack for cpu 'n' pcpu_space[n] + PAGE_SIZE * 2 - CALLFRAME_SIZ
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*
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* Note that the boot stack grows downwards and we assume that we never
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* use enough stack space to trample over the 'struct pcpu' that is at
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* the beginning of the array.
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*
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* The array is aligned on a (PAGE_SIZE * 2) boundary so that the 'struct pcpu'
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* is always in the even page frame of the wired TLB entry on SMP kernels.
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*
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* The array is in the .data section so that the stack does not get zeroed out
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* when the .bss section is zeroed.
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*/
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char pcpu_space[MAXCPU][PAGE_SIZE * 2] \
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__aligned(PAGE_SIZE * 2) __section(".data");
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struct pcpu *pcpup = (struct pcpu *)pcpu_space;
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vm_paddr_t phys_avail[PHYS_AVAIL_ENTRIES + 2];
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vm_paddr_t physmem_desc[PHYS_AVAIL_ENTRIES + 2];
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vm_paddr_t dump_avail[PHYS_AVAIL_ENTRIES + 2];
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#ifdef UNIMPLEMENTED
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struct platform platform;
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#endif
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static void cpu_startup(void *);
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SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
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struct kva_md_info kmi;
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int cpucfg; /* Value of processor config register */
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int num_tlbentries = 64; /* Size of the CPU tlb */
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int cputype;
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extern char MipsException[], MipsExceptionEnd[];
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/* TLB miss handler address and end */
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extern char MipsTLBMiss[], MipsTLBMissEnd[];
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/* Cache error handler */
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extern char MipsCache[], MipsCacheEnd[];
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/* MIPS wait skip region */
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extern char MipsWaitStart[], MipsWaitEnd[];
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extern char edata[], end[];
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u_int32_t bootdev;
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struct bootinfo bootinfo;
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/*
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* First kseg0 address available for use. By default it's equal to &end.
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* But in some cases there might be additional data placed right after
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* _end by loader or ELF trampoline.
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*/
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vm_offset_t kernel_kseg0_end = (vm_offset_t)&end;
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static void
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cpu_startup(void *dummy)
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{
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if (boothowto & RB_VERBOSE)
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bootverbose++;
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printf("real memory = %ju (%juK bytes)\n", ptoa((uintmax_t)realmem),
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ptoa((uintmax_t)realmem) / 1024);
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/*
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* Display any holes after the first chunk of extended memory.
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*/
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if (bootverbose) {
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int indx;
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printf("Physical memory chunk(s):\n");
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for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
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vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
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printf("0x%08jx - 0x%08jx, %ju bytes (%ju pages)\n",
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(uintmax_t)phys_avail[indx],
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(uintmax_t)phys_avail[indx + 1] - 1,
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(uintmax_t)size1,
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(uintmax_t)size1 / PAGE_SIZE);
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}
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}
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vm_ksubmap_init(&kmi);
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printf("avail memory = %ju (%juMB)\n",
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ptoa((uintmax_t)vm_free_count()),
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ptoa((uintmax_t)vm_free_count()) / 1048576);
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cpu_init_interrupts();
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/*
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* Set up buffers, so they can be used to read disk labels.
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*/
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bufinit();
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vm_pager_bufferinit();
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}
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/*
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* Shutdown the CPU as much as possible
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*/
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void
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cpu_reset(void)
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{
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platform_reset();
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}
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/*
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* Flush the D-cache for non-DMA I/O so that the I-cache can
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* be made coherent later.
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*/
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void
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cpu_flush_dcache(void *ptr, size_t len)
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{
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/* TBD */
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}
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/* Get current clock frequency for the given cpu id. */
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int
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cpu_est_clockrate(int cpu_id, uint64_t *rate)
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{
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return (ENXIO);
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}
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/*
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* Shutdown the CPU as much as possible
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*/
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void
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cpu_halt(void)
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{
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for (;;)
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;
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}
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SYSCTL_STRUCT(_machdep, OID_AUTO, bootinfo, CTLFLAG_RD, &bootinfo,
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bootinfo, "Bootinfo struct: kernel filename, BIOS harddisk geometry, etc");
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/*
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* Initialize per cpu data structures, include curthread.
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*/
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void
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mips_pcpu0_init()
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{
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/* Initialize pcpu info of cpu-zero */
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pcpu_init(PCPU_ADDR(0), 0, sizeof(struct pcpu));
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PCPU_SET(curthread, &thread0);
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}
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/*
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* Initialize mips and configure to run kernel
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*/
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void
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mips_proc0_init(void)
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{
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#ifdef SMP
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if (platform_processor_id() != 0)
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panic("BSP must be processor number 0");
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#endif
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proc_linkup0(&proc0, &thread0);
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KASSERT((kstack0 & PAGE_MASK) == 0,
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("kstack0 is not aligned on a page boundary: 0x%0lx",
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(long)kstack0));
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thread0.td_kstack = kstack0;
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thread0.td_kstack_pages = KSTACK_PAGES;
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/*
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* Do not use cpu_thread_alloc to initialize these fields
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* thread0 is the only thread that has kstack located in KSEG0
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* while cpu_thread_alloc handles kstack allocated in KSEG2.
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*/
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thread0.td_pcb = (struct pcb *)(thread0.td_kstack +
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thread0.td_kstack_pages * PAGE_SIZE) - 1;
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thread0.td_frame = &thread0.td_pcb->pcb_regs;
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/* Steal memory for the dynamic per-cpu area. */
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dpcpu_init((void *)pmap_steal_memory(DPCPU_SIZE), 0);
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PCPU_SET(curpcb, thread0.td_pcb);
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/*
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* There is no need to initialize md_upte array for thread0 as it's
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* located in .bss section and should be explicitly zeroed during
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* kernel initialization.
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*/
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}
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void
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cpu_initclocks(void)
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{
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platform_initclocks();
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cpu_initclocks_bsp();
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}
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/*
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* Initialize the hardware exception vectors, and the jump table used to
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* call locore cache and TLB management functions, based on the kind
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* of CPU the kernel is running on.
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*/
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void
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mips_vector_init(void)
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{
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/*
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* Make sure that the Wait region logic is not been
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* changed
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*/
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if (MipsWaitEnd - MipsWaitStart != 16)
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panic("startup: MIPS wait region not correct");
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/*
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* Copy down exception vector code.
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*/
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if (MipsTLBMissEnd - MipsTLBMiss > 0x80)
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panic("startup: UTLB code too large");
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if (MipsCacheEnd - MipsCache > 0x80)
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panic("startup: Cache error code too large");
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bcopy(MipsTLBMiss, (void *)MIPS_UTLB_MISS_EXC_VEC,
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MipsTLBMissEnd - MipsTLBMiss);
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/*
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* XXXRW: Why don't we install the XTLB handler for all 64-bit
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* architectures?
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*/
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#if defined(__mips_n64) || defined(CPU_RMI) || defined(CPU_NLM) || defined(CPU_BERI)
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/* Fake, but sufficient, for the 32-bit with 64-bit hardware addresses */
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bcopy(MipsTLBMiss, (void *)MIPS_XTLB_MISS_EXC_VEC,
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MipsTLBMissEnd - MipsTLBMiss);
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#endif
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bcopy(MipsException, (void *)MIPS_GEN_EXC_VEC,
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MipsExceptionEnd - MipsException);
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bcopy(MipsCache, (void *)MIPS_CACHE_ERR_EXC_VEC,
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MipsCacheEnd - MipsCache);
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/*
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* Clear out the I and D caches.
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*/
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mips_icache_sync_all();
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mips_dcache_wbinv_all();
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/*
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* Mask all interrupts. Each interrupt will be enabled
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* when handler is installed for it
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*/
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set_intr_mask(0);
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/* Clear BEV in SR so we start handling our own exceptions */
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mips_wr_status(mips_rd_status() & ~MIPS_SR_BEV);
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}
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/*
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* Fix kernel_kseg0_end address in case trampoline placed debug sympols
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* data there
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*/
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void
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mips_postboot_fixup(void)
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{
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/*
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* We store u_long sized objects into the reload area, so the array
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* must be so aligned. The standard allows any alignment for char data.
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*/
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_Alignas(_Alignof(u_long)) static char fake_preload[256];
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caddr_t preload_ptr = (caddr_t)&fake_preload[0];
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size_t size = 0;
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#define PRELOAD_PUSH_VALUE(type, value) do { \
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*(type *)(preload_ptr + size) = (value); \
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size += sizeof(type); \
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} while (0);
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/*
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* Provide kernel module file information
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*/
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PRELOAD_PUSH_VALUE(uint32_t, MODINFO_NAME);
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PRELOAD_PUSH_VALUE(uint32_t, strlen("kernel") + 1);
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strcpy((char*)(preload_ptr + size), "kernel");
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size += strlen("kernel") + 1;
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size = roundup(size, sizeof(u_long));
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PRELOAD_PUSH_VALUE(uint32_t, MODINFO_TYPE);
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PRELOAD_PUSH_VALUE(uint32_t, strlen("elf kernel") + 1);
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strcpy((char*)(preload_ptr + size), "elf kernel");
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size += strlen("elf kernel") + 1;
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size = roundup(size, sizeof(u_long));
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PRELOAD_PUSH_VALUE(uint32_t, MODINFO_ADDR);
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PRELOAD_PUSH_VALUE(uint32_t, sizeof(vm_offset_t));
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PRELOAD_PUSH_VALUE(vm_offset_t, KERNLOADADDR);
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size = roundup(size, sizeof(u_long));
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PRELOAD_PUSH_VALUE(uint32_t, MODINFO_SIZE);
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PRELOAD_PUSH_VALUE(uint32_t, sizeof(size_t));
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PRELOAD_PUSH_VALUE(size_t, (size_t)&end - KERNLOADADDR);
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size = roundup(size, sizeof(u_long));
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/* End marker */
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PRELOAD_PUSH_VALUE(uint32_t, 0);
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PRELOAD_PUSH_VALUE(uint32_t, 0);
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#undef PRELOAD_PUSH_VALUE
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KASSERT((size < sizeof(fake_preload)),
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("fake preload size is more thenallocated"));
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preload_metadata = (void *)fake_preload;
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#ifdef DDB
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Elf_Size *trampoline_data = (Elf_Size*)kernel_kseg0_end;
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Elf_Size symtabsize = 0;
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vm_offset_t ksym_start;
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vm_offset_t ksym_end;
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if (trampoline_data[0] == SYMTAB_MAGIC) {
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symtabsize = trampoline_data[1];
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kernel_kseg0_end += 2 * sizeof(Elf_Size);
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/* start of .symtab */
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ksym_start = kernel_kseg0_end;
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kernel_kseg0_end += symtabsize;
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/* end of .strtab */
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ksym_end = kernel_kseg0_end;
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db_fetch_ksymtab(ksym_start, ksym_end);
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}
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#endif
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}
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#ifdef SMP
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void
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mips_pcpu_tlb_init(struct pcpu *pcpu)
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{
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vm_paddr_t pa;
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pt_entry_t pte;
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/*
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* Map the pcpu structure at the virtual address 'pcpup'.
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* We use a wired tlb index to do this one-time mapping.
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*/
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pa = vtophys(pcpu);
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pte = PTE_D | PTE_V | PTE_G | PTE_C_CACHE;
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tlb_insert_wired(PCPU_TLB_ENTRY, (vm_offset_t)pcpup,
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TLBLO_PA_TO_PFN(pa) | pte,
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TLBLO_PA_TO_PFN(pa + PAGE_SIZE) | pte);
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}
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#endif
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/*
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* Initialise a struct pcpu.
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*/
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void
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cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
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{
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pcpu->pc_next_asid = 1;
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pcpu->pc_asid_generation = 1;
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pcpu->pc_self = pcpu;
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#ifdef SMP
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if ((vm_offset_t)pcpup >= VM_MIN_KERNEL_ADDRESS &&
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(vm_offset_t)pcpup <= VM_MAX_KERNEL_ADDRESS) {
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mips_pcpu_tlb_init(pcpu);
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}
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#endif
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}
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int
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fill_dbregs(struct thread *td, struct dbreg *dbregs)
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{
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/* No debug registers on mips */
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return (ENOSYS);
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}
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int
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set_dbregs(struct thread *td, struct dbreg *dbregs)
|
|
{
|
|
|
|
/* No debug registers on mips */
|
|
return (ENOSYS);
|
|
}
|
|
|
|
void
|
|
spinlock_enter(void)
|
|
{
|
|
struct thread *td;
|
|
register_t intr;
|
|
|
|
td = curthread;
|
|
if (td->td_md.md_spinlock_count == 0) {
|
|
intr = intr_disable();
|
|
td->td_md.md_spinlock_count = 1;
|
|
td->td_md.md_saved_intr = intr;
|
|
} else
|
|
td->td_md.md_spinlock_count++;
|
|
critical_enter();
|
|
}
|
|
|
|
void
|
|
spinlock_exit(void)
|
|
{
|
|
struct thread *td;
|
|
register_t intr;
|
|
|
|
td = curthread;
|
|
critical_exit();
|
|
intr = td->td_md.md_saved_intr;
|
|
td->td_md.md_spinlock_count--;
|
|
if (td->td_md.md_spinlock_count == 0)
|
|
intr_restore(intr);
|
|
}
|
|
|
|
/*
|
|
* call platform specific code to halt (until next interrupt) for the idle loop
|
|
*/
|
|
void
|
|
cpu_idle(int busy)
|
|
{
|
|
KASSERT((mips_rd_status() & MIPS_SR_INT_IE) != 0,
|
|
("interrupts disabled in idle process."));
|
|
KASSERT((mips_rd_status() & MIPS_INT_MASK) != 0,
|
|
("all interrupts masked in idle process."));
|
|
|
|
if (!busy) {
|
|
critical_enter();
|
|
cpu_idleclock();
|
|
}
|
|
mips_wait();
|
|
if (!busy) {
|
|
cpu_activeclock();
|
|
critical_exit();
|
|
}
|
|
}
|
|
|
|
int
|
|
cpu_idle_wakeup(int cpu)
|
|
{
|
|
|
|
return (0);
|
|
}
|
|
|
|
int
|
|
is_cacheable_mem(vm_paddr_t pa)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; physmem_desc[i + 1] != 0; i += 2) {
|
|
if (pa >= physmem_desc[i] && pa < physmem_desc[i + 1])
|
|
return (1);
|
|
}
|
|
|
|
return (0);
|
|
}
|