c033f53b7e
Enable FCS stripping and padding 10 bytes bit of RX MAC control register. Due to lack of SiS190 controller, I'm not sure whether this is also applicable to SiS190 so this feature is only activated on SiS191 controller. The controller can pad 10 bytes before DMAing a received frame to RX buffer and received bytes include the padded bytes. This padding is very useful on strict-alignment architectures because driver does not have to copy received frame to align IP header on 4 bytes boundary. It also gives better RX performance on non-strict alignment architectures. Special thanks to xclin to give me valuable register information. Without his enthusiastic trial and errors this wouldn't be even possible. While I'm here tighten validity check of received frame. Controller clears RDS_CRCOK bit when it received bad CRC frames. xclin found that using loop back testing. Tested by: xclin <xclin <> cs dot nctu dot edu dot tw >
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