370 lines
8.1 KiB
C
370 lines
8.1 KiB
C
/*-
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* Copyright (c) 2008 Marcel Moolenaar
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/ktr.h>
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#include <sys/bus.h>
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#include <sys/cpuset.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/pcpu.h>
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#include <sys/proc.h>
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#include <sys/sched.h>
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#include <sys/smp.h>
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#include <vm/vm.h>
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#include <vm/vm_param.h>
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#include <vm/pmap.h>
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#include <vm/vm_map.h>
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#include <vm/vm_extern.h>
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#include <vm/vm_kern.h>
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#include <machine/bus.h>
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#include <machine/cpu.h>
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#include <machine/intr_machdep.h>
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#include <machine/pcb.h>
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#include <machine/platform.h>
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#include <machine/md_var.h>
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#include <machine/smp.h>
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#include "pic_if.h"
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extern struct pcpu __pcpu[MAXCPU];
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volatile static int ap_awake;
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volatile static u_int ap_letgo;
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volatile static u_quad_t ap_timebase;
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static u_int ipi_msg_cnt[32];
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static struct mtx ap_boot_mtx;
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struct pcb stoppcbs[MAXCPU];
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void
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machdep_ap_bootstrap(void)
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{
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/* Set up important bits on the CPU (HID registers, etc.) */
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cpudep_ap_setup();
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/* Set PIR */
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PCPU_SET(pir, mfspr(SPR_PIR));
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PCPU_SET(awake, 1);
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__asm __volatile("msync; isync");
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while (ap_letgo == 0)
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;
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/* Initialize DEC and TB, sync with the BSP values */
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#ifdef __powerpc64__
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/* Writing to the time base register is hypervisor-privileged */
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if (mfmsr() & PSL_HV)
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mttb(ap_timebase);
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#else
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mttb(ap_timebase);
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#endif
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decr_ap_init();
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/* Serialize console output and AP count increment */
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mtx_lock_spin(&ap_boot_mtx);
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ap_awake++;
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printf("SMP: AP CPU #%d launched\n", PCPU_GET(cpuid));
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mtx_unlock_spin(&ap_boot_mtx);
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/* Start per-CPU event timers. */
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cpu_initclocks_ap();
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/* Announce ourselves awake, and enter the scheduler */
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sched_throw(NULL);
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}
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void
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cpu_mp_setmaxid(void)
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{
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struct cpuref cpuref;
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int error;
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mp_ncpus = 0;
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error = platform_smp_first_cpu(&cpuref);
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while (!error) {
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mp_ncpus++;
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error = platform_smp_next_cpu(&cpuref);
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}
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/* Sanity. */
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if (mp_ncpus == 0)
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mp_ncpus = 1;
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/*
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* Set the largest cpuid we're going to use. This is necessary
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* for VM initialization.
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*/
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mp_maxid = min(mp_ncpus, MAXCPU) - 1;
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}
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int
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cpu_mp_probe(void)
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{
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/*
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* We're not going to enable SMP if there's only 1 processor.
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*/
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return (mp_ncpus > 1);
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}
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void
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cpu_mp_start(void)
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{
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struct cpuref bsp, cpu;
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struct pcpu *pc;
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int error;
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error = platform_smp_get_bsp(&bsp);
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KASSERT(error == 0, ("Don't know BSP"));
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KASSERT(bsp.cr_cpuid == 0, ("%s: cpuid != 0", __func__));
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error = platform_smp_first_cpu(&cpu);
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while (!error) {
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if (cpu.cr_cpuid >= MAXCPU) {
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printf("SMP: cpu%d: skipped -- ID out of range\n",
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cpu.cr_cpuid);
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goto next;
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}
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if (CPU_ISSET(cpu.cr_cpuid, &all_cpus)) {
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printf("SMP: cpu%d: skipped - duplicate ID\n",
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cpu.cr_cpuid);
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goto next;
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}
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if (cpu.cr_cpuid != bsp.cr_cpuid) {
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void *dpcpu;
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pc = &__pcpu[cpu.cr_cpuid];
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dpcpu = (void *)kmem_alloc(kernel_map, DPCPU_SIZE);
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pcpu_init(pc, cpu.cr_cpuid, sizeof(*pc));
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dpcpu_init(dpcpu, cpu.cr_cpuid);
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} else {
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pc = pcpup;
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pc->pc_cpuid = bsp.cr_cpuid;
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pc->pc_bsp = 1;
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}
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pc->pc_hwref = cpu.cr_hwref;
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CPU_SET(pc->pc_cpuid, &all_cpus);
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next:
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error = platform_smp_next_cpu(&cpu);
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}
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}
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void
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cpu_mp_announce(void)
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{
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struct pcpu *pc;
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int i;
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for (i = 0; i <= mp_maxid; i++) {
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pc = pcpu_find(i);
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if (pc == NULL)
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continue;
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printf("cpu%d: dev=%x", i, (int)pc->pc_hwref);
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if (pc->pc_bsp)
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printf(" (BSP)");
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printf("\n");
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}
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}
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static void
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cpu_mp_unleash(void *dummy)
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{
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struct pcpu *pc;
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int cpus, timeout;
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if (mp_ncpus <= 1)
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return;
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mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN);
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cpus = 0;
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smp_cpus = 0;
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STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) {
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cpus++;
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if (!pc->pc_bsp) {
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if (bootverbose)
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printf("Waking up CPU %d (dev=%x)\n",
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pc->pc_cpuid, (int)pc->pc_hwref);
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platform_smp_start_cpu(pc);
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timeout = 2000; /* wait 2sec for the AP */
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while (!pc->pc_awake && --timeout > 0)
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DELAY(1000);
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} else {
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PCPU_SET(pir, mfspr(SPR_PIR));
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pc->pc_awake = 1;
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}
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if (pc->pc_awake) {
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if (bootverbose)
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printf("Adding CPU %d, pir=%x, awake=%x\n",
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pc->pc_cpuid, pc->pc_pir, pc->pc_awake);
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smp_cpus++;
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} else
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CPU_SET(pc->pc_cpuid, &stopped_cpus);
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}
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ap_awake = 1;
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/* Provide our current DEC and TB values for APs */
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ap_timebase = mftb() + 10;
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__asm __volatile("msync; isync");
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/* Let APs continue */
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atomic_store_rel_int(&ap_letgo, 1);
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#ifdef __powerpc64__
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/* Writing to the time base register is hypervisor-privileged */
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if (mfmsr() & PSL_HV)
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mttb(ap_timebase);
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#else
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mttb(ap_timebase);
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#endif
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while (ap_awake < smp_cpus)
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;
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if (smp_cpus != cpus || cpus != mp_ncpus) {
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printf("SMP: %d CPUs found; %d CPUs usable; %d CPUs woken\n",
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mp_ncpus, cpus, smp_cpus);
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}
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/* Let the APs get into the scheduler */
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DELAY(10000);
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smp_active = 1;
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smp_started = 1;
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}
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SYSINIT(start_aps, SI_SUB_SMP, SI_ORDER_FIRST, cpu_mp_unleash, NULL);
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int
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powerpc_ipi_handler(void *arg)
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{
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u_int cpuid;
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uint32_t ipimask;
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int msg;
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CTR2(KTR_SMP, "%s: MSR 0x%08x", __func__, mfmsr());
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ipimask = atomic_readandclear_32(&(pcpup->pc_ipimask));
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if (ipimask == 0)
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return (FILTER_STRAY);
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while ((msg = ffs(ipimask) - 1) != -1) {
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ipimask &= ~(1u << msg);
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ipi_msg_cnt[msg]++;
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switch (msg) {
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case IPI_AST:
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CTR1(KTR_SMP, "%s: IPI_AST", __func__);
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break;
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case IPI_PREEMPT:
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CTR1(KTR_SMP, "%s: IPI_PREEMPT", __func__);
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sched_preempt(curthread);
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break;
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case IPI_RENDEZVOUS:
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CTR1(KTR_SMP, "%s: IPI_RENDEZVOUS", __func__);
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smp_rendezvous_action();
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break;
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case IPI_STOP:
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/*
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* IPI_STOP_HARD is mapped to IPI_STOP so it is not
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* necessary to add such case in the switch.
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*/
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CTR1(KTR_SMP, "%s: IPI_STOP or IPI_STOP_HARD (stop)",
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__func__);
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cpuid = PCPU_GET(cpuid);
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savectx(&stoppcbs[cpuid]);
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savectx(PCPU_GET(curpcb));
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CPU_SET_ATOMIC(cpuid, &stopped_cpus);
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while (!CPU_ISSET(cpuid, &started_cpus))
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cpu_spinwait();
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CPU_CLR_ATOMIC(cpuid, &stopped_cpus);
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CPU_CLR_ATOMIC(cpuid, &started_cpus);
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CTR1(KTR_SMP, "%s: IPI_STOP (restart)", __func__);
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break;
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case IPI_HARDCLOCK:
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CTR1(KTR_SMP, "%s: IPI_HARDCLOCK", __func__);
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hardclockintr();
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break;
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}
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}
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return (FILTER_HANDLED);
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}
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static void
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ipi_send(struct pcpu *pc, int ipi)
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{
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CTR4(KTR_SMP, "%s: pc=%p, targetcpu=%d, IPI=%d", __func__,
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pc, pc->pc_cpuid, ipi);
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atomic_set_32(&pc->pc_ipimask, (1 << ipi));
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PIC_IPI(root_pic, pc->pc_cpuid);
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CTR1(KTR_SMP, "%s: sent", __func__);
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}
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/* Send an IPI to a set of cpus. */
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void
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ipi_selected(cpuset_t cpus, int ipi)
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{
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struct pcpu *pc;
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STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) {
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if (CPU_ISSET(pc->pc_cpuid, &cpus))
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ipi_send(pc, ipi);
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}
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}
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/* Send an IPI to a specific CPU. */
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void
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ipi_cpu(int cpu, u_int ipi)
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{
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ipi_send(cpuid_to_pcpu[cpu], ipi);
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}
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/* Send an IPI to all CPUs EXCEPT myself. */
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void
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ipi_all_but_self(int ipi)
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{
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struct pcpu *pc;
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STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) {
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if (pc != pcpup)
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ipi_send(pc, ipi);
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}
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}
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