95a3636709
Bay Trail has three banks of GPIOs exposed to userland as /dev/gpiocN, where N is 1, 2, and 3. Pins in each bank are pre-named to match names on boards schematics: GPIO_S0_SCnn, GPIO_S0_NCnn, and GPIO_S5_nn. Controller supports edge-triggered and level-triggered interrupts but current version of the driver does not have interrupts support
436 lines
11 KiB
C
436 lines
11 KiB
C
/*-
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* Copyright (c) 2016 Oleksandr Tymoshenko <gonzo@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_acpi.h"
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/gpio.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/proc.h>
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#include <sys/rman.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <contrib/dev/acpica/include/acpi.h>
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#include <contrib/dev/acpica/include/accommon.h>
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#include <dev/acpica/acpivar.h>
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#include <dev/gpio/gpiobusvar.h>
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#include "gpio_if.h"
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/**
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* Macros for driver mutex locking
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*/
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#define BYTGPIO_LOCK(_sc) mtx_lock_spin(&(_sc)->sc_mtx)
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#define BYTGPIO_UNLOCK(_sc) mtx_unlock_spin(&(_sc)->sc_mtx)
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#define BYTGPIO_LOCK_INIT(_sc) \
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mtx_init(&_sc->sc_mtx, device_get_nameunit((_sc)->sc_dev), \
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"bytgpio", MTX_SPIN)
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#define BYTGPIO_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_mtx)
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#define BYTGPIO_ASSERT_LOCKED(_sc) mtx_assert(&(_sc)->sc_mtx, MA_OWNED)
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#define BYTGPIO_ASSERT_UNLOCKED(_sc) mtx_assert(&(_sc)->sc_mtx, MA_NOTOWNED)
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struct bytgpio_softc {
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ACPI_HANDLE sc_handle;
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device_t sc_dev;
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device_t sc_busdev;
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struct mtx sc_mtx;
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int sc_mem_rid;
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struct resource *sc_mem_res;
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int sc_npins;
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const char* sc_bank_prefix;
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const int *sc_pinpad_map;
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};
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static int bytgpio_probe(device_t dev);
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static int bytgpio_attach(device_t dev);
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#define SCORE_UID 1
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#define SCORE_BANK_PREFIX "GPIO_S0_SC"
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const int bytgpio_score_pins[] = {
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85, 89, 93, 96, 99, 102, 98, 101, 34, 37, 36, 38, 39, 35, 40,
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84, 62, 61, 64, 59, 54, 56, 60, 55, 63, 57, 51, 50, 53, 47,
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52, 49, 48, 43, 46, 41, 45, 42, 58, 44, 95, 105, 70, 68, 67,
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66, 69, 71, 65, 72, 86, 90, 88, 92, 103, 77, 79, 83, 78, 81,
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80, 82, 13, 12, 15, 14, 17, 18, 19, 16, 2, 1, 0, 4, 6, 7, 9,
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8, 33, 32, 31, 30, 29, 27, 25, 28, 26, 23, 21, 20, 24, 22, 5,
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3, 10, 11, 106, 87, 91, 104, 97, 100
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};
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#define SCORE_PINS nitems(bytgpio_score_pins)
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#define NCORE_UID 2
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#define NCORE_BANK_PREFIX "GPIO_S0_NC"
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const int bytgpio_ncore_pins[] = {
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19, 18, 17, 20, 21, 22, 24, 25, 23, 16, 14, 15, 12, 26, 27,
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1, 4, 8, 11, 0, 3, 6, 10, 13, 2, 5, 9, 7
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};
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#define NCORE_PINS nitems(bytgpio_ncore_pins)
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#define SUS_UID 3
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#define SUS_BANK_PREFIX "GPIO_S5_"
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const int bytgpio_sus_pins[] = {
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29, 33, 30, 31, 32, 34, 36, 35, 38, 37, 18, 7, 11, 20, 17, 1,
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8, 10, 19, 12, 0, 2, 23, 39, 28, 27, 22, 21, 24, 25, 26, 51,
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56, 54, 49, 55, 48, 57, 50, 58, 52, 53, 59, 40
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};
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#define SUS_PINS nitems(bytgpio_sus_pins)
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#define BYGPIO_PIN_REGISTER(sc, pin, reg) ((sc)->sc_pinpad_map[(pin)] * 16 + (reg))
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#define BYTGPIO_PCONF0 0x0000
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#define BYTGPIO_PAD_VAL 0x0008
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#define BYTGPIO_PAD_VAL_LEVEL (1 << 0)
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#define BYTGPIO_PAD_VAL_I_OUTPUT_ENABLED (1 << 1)
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#define BYTGPIO_PAD_VAL_I_INPUT_ENABLED (1 << 2)
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#define BYTGPIO_PAD_VAL_DIR_MASK (3 << 1)
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static inline uint32_t
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bytgpio_read_4(struct bytgpio_softc *sc, bus_size_t off)
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{
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return (bus_read_4(sc->sc_mem_res, off));
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}
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static inline void
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bytgpio_write_4(struct bytgpio_softc *sc, bus_size_t off,
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uint32_t val)
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{
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bus_write_4(sc->sc_mem_res, off, val);
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}
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static device_t
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bytgpio_get_bus(device_t dev)
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{
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struct bytgpio_softc *sc;
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sc = device_get_softc(dev);
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return (sc->sc_busdev);
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}
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static int
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bytgpio_pin_max(device_t dev, int *maxpin)
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{
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struct bytgpio_softc *sc;
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sc = device_get_softc(dev);
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*maxpin = sc->sc_npins - 1;
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return (0);
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}
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static int
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bytgpio_valid_pin(struct bytgpio_softc *sc, int pin)
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{
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if (pin >= sc->sc_npins || sc->sc_mem_res == NULL)
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return (EINVAL);
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return (0);
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}
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static int
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bytgpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
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{
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struct bytgpio_softc *sc;
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sc = device_get_softc(dev);
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if (bytgpio_valid_pin(sc, pin) != 0)
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return (EINVAL);
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*caps = GPIO_PIN_INPUT | GPIO_PIN_OUTPUT;
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return (0);
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}
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static int
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bytgpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
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{
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struct bytgpio_softc *sc;
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uint32_t reg, val;
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sc = device_get_softc(dev);
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if (bytgpio_valid_pin(sc, pin) != 0)
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return (EINVAL);
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/* Get the current pin state */
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BYTGPIO_LOCK(sc);
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reg = BYGPIO_PIN_REGISTER(sc, pin, BYTGPIO_PAD_VAL);
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val = bytgpio_read_4(sc, reg);
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*flags = 0;
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if ((val & BYTGPIO_PAD_VAL_I_OUTPUT_ENABLED) == 0)
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*flags |= GPIO_PIN_OUTPUT;
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/*
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* this bit can be cleared to read current output value
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* sou output bit takes precedense
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*/
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else if ((val & BYTGPIO_PAD_VAL_I_INPUT_ENABLED) == 0)
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*flags |= GPIO_PIN_INPUT;
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BYTGPIO_UNLOCK(sc);
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return (0);
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}
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static int
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bytgpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
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{
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struct bytgpio_softc *sc;
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uint32_t reg, val;
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uint32_t allowed;
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sc = device_get_softc(dev);
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if (bytgpio_valid_pin(sc, pin) != 0)
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return (EINVAL);
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allowed = GPIO_PIN_INPUT | GPIO_PIN_OUTPUT;
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/*
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* Only directtion flag allowed
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*/
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if (flags & ~allowed)
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return (EINVAL);
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/*
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* Not both directions simultaneously
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*/
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if ((flags & allowed) == allowed)
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return (EINVAL);
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/* Set the GPIO mode and state */
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BYTGPIO_LOCK(sc);
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reg = BYGPIO_PIN_REGISTER(sc, pin, BYTGPIO_PAD_VAL);
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val = bytgpio_read_4(sc, reg);
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val = val | BYTGPIO_PAD_VAL_DIR_MASK;
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if (flags & GPIO_PIN_INPUT)
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val = val & ~BYTGPIO_PAD_VAL_I_INPUT_ENABLED;
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if (flags & GPIO_PIN_OUTPUT)
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val = val & ~BYTGPIO_PAD_VAL_I_OUTPUT_ENABLED;
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bytgpio_write_4(sc, reg, val);
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BYTGPIO_UNLOCK(sc);
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return (0);
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}
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static int
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bytgpio_pin_getname(device_t dev, uint32_t pin, char *name)
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{
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struct bytgpio_softc *sc;
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sc = device_get_softc(dev);
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if (bytgpio_valid_pin(sc, pin) != 0)
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return (EINVAL);
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/* Set a very simple name */
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snprintf(name, GPIOMAXNAME, "%s%u", sc->sc_bank_prefix, pin);
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name[GPIOMAXNAME - 1] = '\0';
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return (0);
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}
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static int
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bytgpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
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{
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struct bytgpio_softc *sc;
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uint32_t reg, val;
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sc = device_get_softc(dev);
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if (bytgpio_valid_pin(sc, pin) != 0)
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return (EINVAL);
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BYTGPIO_LOCK(sc);
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reg = BYGPIO_PIN_REGISTER(sc, pin, BYTGPIO_PAD_VAL);
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val = bytgpio_read_4(sc, reg);
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if (value == GPIO_PIN_LOW)
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val = val & ~BYTGPIO_PAD_VAL_LEVEL;
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else
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val = val | BYTGPIO_PAD_VAL_LEVEL;
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bytgpio_write_4(sc, reg, val);
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BYTGPIO_UNLOCK(sc);
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return (0);
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}
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static int
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bytgpio_pin_get(device_t dev, uint32_t pin, unsigned int *value)
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{
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struct bytgpio_softc *sc;
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uint32_t reg, val;
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sc = device_get_softc(dev);
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if (bytgpio_valid_pin(sc, pin) != 0)
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return (EINVAL);
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BYTGPIO_LOCK(sc);
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reg = BYGPIO_PIN_REGISTER(sc, pin, BYTGPIO_PAD_VAL);
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/*
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* Enable input to read current value
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*/
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val = bytgpio_read_4(sc, reg);
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val = val & ~BYTGPIO_PAD_VAL_I_INPUT_ENABLED;
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bytgpio_write_4(sc, reg, val);
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/*
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* And read actual value
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*/
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val = bytgpio_read_4(sc, reg);
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if (val & BYTGPIO_PAD_VAL_LEVEL)
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*value = GPIO_PIN_HIGH;
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else
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*value = GPIO_PIN_LOW;
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BYTGPIO_UNLOCK(sc);
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return (0);
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}
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static int
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bytgpio_pin_toggle(device_t dev, uint32_t pin)
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{
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struct bytgpio_softc *sc;
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uint32_t reg, val;
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sc = device_get_softc(dev);
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if (bytgpio_valid_pin(sc, pin) != 0)
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return (EINVAL);
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/* Toggle the pin */
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BYTGPIO_LOCK(sc);
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reg = BYGPIO_PIN_REGISTER(sc, pin, BYTGPIO_PAD_VAL);
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val = bytgpio_read_4(sc, reg);
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val = val ^ BYTGPIO_PAD_VAL_LEVEL;
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bytgpio_write_4(sc, reg, val);
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BYTGPIO_UNLOCK(sc);
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return (0);
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}
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static int
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bytgpio_probe(device_t dev)
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{
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static char *gpio_ids[] = { "INT33FC", NULL };
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if (acpi_disabled("gpio") ||
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ACPI_ID_PROBE(device_get_parent(dev), dev, gpio_ids) == NULL)
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return (ENXIO);
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device_set_desc(dev, "Intel Baytrail GPIO Controller");
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return (0);
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}
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static int
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bytgpio_attach(device_t dev)
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{
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struct bytgpio_softc *sc;
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ACPI_STATUS status;
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int uid;
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sc = device_get_softc(dev);
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sc->sc_dev = dev;
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sc->sc_handle = acpi_get_handle(dev);
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status = acpi_GetInteger(sc->sc_handle, "_UID", &uid);
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if (ACPI_FAILURE(status)) {
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device_printf(dev, "failed to read _UID\n");
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return (ENXIO);
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}
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switch (uid) {
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case SCORE_UID:
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sc->sc_npins = SCORE_PINS;
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sc->sc_bank_prefix = SCORE_BANK_PREFIX;
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sc->sc_pinpad_map = bytgpio_score_pins;
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break;
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case NCORE_UID:
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sc->sc_npins = NCORE_PINS;
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sc->sc_bank_prefix = NCORE_BANK_PREFIX;
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sc->sc_pinpad_map = bytgpio_ncore_pins;
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break;
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case SUS_UID:
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sc->sc_npins = SUS_PINS;
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sc->sc_bank_prefix = SUS_BANK_PREFIX;
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sc->sc_pinpad_map = bytgpio_sus_pins;
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break;
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default:
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device_printf(dev, "invalid _UID value: %d\n", uid);
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}
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sc->sc_mem_rid = 0;
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sc->sc_mem_res = bus_alloc_resource_any(sc->sc_dev,
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SYS_RES_MEMORY, &sc->sc_mem_rid, RF_ACTIVE);
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if (sc->sc_mem_res == NULL) {
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device_printf(dev, "can't allocate resource\n");
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goto error;
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}
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BYTGPIO_LOCK_INIT(sc);
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sc->sc_busdev = gpiobus_attach_bus(dev);
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if (sc->sc_busdev == NULL) {
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BYTGPIO_LOCK_DESTROY(sc);
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bus_release_resource(dev, SYS_RES_MEMORY,
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sc->sc_mem_rid, sc->sc_mem_res);
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return (ENXIO);
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}
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return (0);
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error:
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return (ENXIO);
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}
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static device_method_t bytgpio_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, bytgpio_probe),
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DEVMETHOD(device_attach, bytgpio_attach),
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/* GPIO protocol */
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DEVMETHOD(gpio_get_bus, bytgpio_get_bus),
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DEVMETHOD(gpio_pin_max, bytgpio_pin_max),
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DEVMETHOD(gpio_pin_getname, bytgpio_pin_getname),
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DEVMETHOD(gpio_pin_getflags, bytgpio_pin_getflags),
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DEVMETHOD(gpio_pin_getcaps, bytgpio_pin_getcaps),
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DEVMETHOD(gpio_pin_setflags, bytgpio_pin_setflags),
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DEVMETHOD(gpio_pin_get, bytgpio_pin_get),
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DEVMETHOD(gpio_pin_set, bytgpio_pin_set),
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DEVMETHOD(gpio_pin_toggle, bytgpio_pin_toggle),
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DEVMETHOD_END
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};
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static driver_t bytgpio_driver = {
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"gpio",
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bytgpio_methods,
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sizeof(struct bytgpio_softc),
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};
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static devclass_t bytgpio_devclass;
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DRIVER_MODULE(bytgpio, acpi, bytgpio_driver, bytgpio_devclass, 0, 0);
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MODULE_DEPEND(bytgpio, acpi, 1, 1, 1);
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MODULE_DEPEND(bytgpio, gpio, 1, 1, 1);
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