John Baldwin 1931cf940a - Heavyweight interrupt threads on the alpha for device I/O interrupts. ... - Make softinterrupts (SWI's) almost completely MI, and divorce them completely from the x86 hardware interrupt code. - The ihandlers array is now gone. Instead, there is a MI shandlers array that just contains SWI handlers. - Most of the former machine/ipl.h files have moved to a new sys/ipl.h. - Stub out all the spl*() functions on all architectures. Submitted by: dfr		2000-10-05 23:09:57 +00:00
..
dwlpx.c	- Heavyweight interrupt threads on the alpha for device I/O interrupts.	2000-10-05 23:09:57 +00:00
dwlpxreg.h
dwlpxvar.h
gbus.c	It's the parent that is a CPU node- not GBus itself.	2000-03-27 08:22:23 +00:00
gbusreg.h	Add $FreeBSD$	2000-05-01 20:32:07 +00:00
gbusvar.h
kftxx.c	* Completely rewrite the alpha busspace to hide the implementation from	2000-08-28 21:48:13 +00:00
kftxxreg.h	Alpha 8200: Remove clause 3 of licence and and some KFTXX defines.	2000-03-18 07:48:15 +00:00
kftxxvar.h
mcclock_tlsb.c	Alpha 8200: minor formatting tweaks; removal of clause 3 of licence.	2000-03-18 07:46:34 +00:00
tlsb.c	complain when you do not create a TLSB node	2000-03-27 08:20:44 +00:00
tlsbcpu.c	Alpha 8200: add a dummy driver for TLSB CPU nodes. Not so dummy, actually,	2000-03-18 07:40:17 +00:00
tlsbmem.c
tlsbreg.h
tlsbvar.h
zs_tlsb.c	Alpha 8200: Rework to get working properly with real h/w. This isn't a	2000-03-18 07:46:05 +00:00
zsreg.h
zsvar.h