c21e0da2f8
is not a size of 1. Since we already know there is a FIFO, we can safely assume that it is at least 16 bytes. Note that all this is mostly academic anyway. We don't use the size of the Rx FIFO currently. If we add support for hardware flow control, we only care about Rx FIFO sizes larger than 16. |
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.. | ||
uart_bus_acpi.c | ||
uart_bus_ebus.c | ||
uart_bus_isa.c | ||
uart_bus_pci.c | ||
uart_bus_puc.c | ||
uart_bus.h | ||
uart_core.c | ||
uart_cpu_alpha.c | ||
uart_cpu_amd64.c | ||
uart_cpu_i386.c | ||
uart_cpu_ia64.c | ||
uart_cpu_pc98.c | ||
uart_cpu_sparc64.c | ||
uart_cpu.h | ||
uart_dev_i8251.c | ||
uart_dev_i8251.h | ||
uart_dev_ns8250.c | ||
uart_dev_ns8250.h | ||
uart_dev_sab82532.c | ||
uart_dev_sab82532.h | ||
uart_dev_z8530.c | ||
uart_dev_z8530.h | ||
uart_if.m | ||
uart_tty.c | ||
uart.h |